CPU type: AM3894ACYG
Boot mode: NAND FLASH
To access some register in U-boot program can make CPU halt!
Why ? What reason is it ?
Reference document: SPRS681D (OCTOBER 2010, REVISED, APRIL 2012 )
2.8.2 "L4 Memory Map"
access following registers OK
=================================
UART0 0x48020000-0x48020FFF 4KB Peripheral Registers
UART1 0x48022000-0x48022FFF 4KB Peripheral Registers
UART2 0x48024000-0x48024FFF 4KB Peripheral Registers
I2C0 0x48028000-0x48028FFF 4KB Peripheral Registers
I2C1 0x4802A000-0x4802AFFF 4KB Peripheral Registers
TIMER1 0x4802E000-0x4802EFFF 4KB Peripheral Registers
SPIOCP 0x48030000-0x48030FFF 4KB Peripheral Registers
access following registers, CPU halt !!!
==========================================
GPIO0 0x48032000-0x48032FFF 4KB Peripheral Registers
McASP0 CFG 0x48038000-0x48039FFF 8KB Peripheral Registers
McASP1 CFG 0x4803C000-0x4803DFFF 8KB Peripheral Registers
TIMER2 0x48040000-0x48040FFF 4KB Peripheral Registers
TIMER3 0x48042000-0x48042FFF 4KB Peripheral Registers
TIMER4 0x48044000-0x48044FFF 4KB Peripheral Registers
TIMER5 0x48046000-0x48046FFF 4KB Peripheral Registers
TIMER6 0x48048000-0x48048FFF 4KB Peripheral Registers
TIMER7 0x4804A000-0x4804AFFF 4KB Peripheral Registers
GPIO1 0x4804C000-0x4804CFFF 4KB Peripheral Registers
example code:
\u-boot-2010.06-psp04.04.00.01\board\ti\ti8168\evm.c
void s_init(u32 in_ddr)
{
u32 a,b;
... ...
#if 1
/* configure GP0[7], GP0[24], GP0[26], GP0[27] as output */
/* (0x48032000 + 0x0134) */
a = __raw_readl(GPIO_OE_0);
a &= ~((1 << 7) | (1 << 24) | (1 << 26) | (1 << 27));
__raw_writel(a, GPIO_OE_0);
udelay(20);
/* configure GP1[9], GP1[11], GP1[12], GP1[22] as output */
/* (0x4804C000 + 0x0134) */
a = __raw_readl(GPIO_OE_1);
a &= ~((1 << 9) | (1 << 11) | (1 << 12) | (1 << 22));
__raw_writel(a, GPIO_OE_1);
udelay(20);
#endif
... ...
return;
}
