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Interfacing to LPDDR1 RAM MT46H128M16LFCK6

Does anybody out there have experience in interfacing the AM335x to this DDRm RAM?  I believe I have the correct physical configuration but am trying to work out the initialization sequence.  I can readback for awhile but appear to lose (or never had) refresh.  This is unfortunately different from what's on the EVM.

Thanks,

Bruce Bassett