I have a bare-metal program that I have successfully run on the Cortex-A9 master processor in the OMAP4460. This program has a simple main() that writes to a couple of peripherals. I would like to extend this program so that has an interrupt service routine that hooks into the Cortex-A9 IRQ. How should this work, and is there an example?
Perhaps I need to locate the ISR at a specific RAM address...? If this is true, then how can I specify this with the TI CCS tools, and is there code already in place to do the stack/context switching, or will I have to write my own assembly to do this?
For context, here is my setup. PandaBoard ES with an XDS100v2 debugger, TI CCS v5.2.1, custom X-Loader in SDRAM does everything normally except that it does not attempt to load U-boot or branch to DDR. After the OMAP4460 executes its ROM code, along with the modified X-Loader code, I can begin the debug session (with GEL files) to get the chip in a clocked and powered state.
Thanks,
Errett
