HPI (Host port interface) on OMAP l138: HRDY is always high

New updates

Now  HRDY moves correctly.
I had to reset HPIC = 0x00000000 into Dsp.

Maybe this procedure is necessary to resettar HPIRSTH, because it isn't accessible from the external host (R-1), but only by DSP(R/W-1)  (Spruh77A pag 961).

Unfortunately reading and writing data doesn't work.

Is it possible that HPI DMA Logic is locked?

The HPI signals cycle are corrected.

What should I configure?

Can the ARM interfere with read-write operations?

Can I give special privileges to HPI? It seems that i don't  have access to data.

Thanks

New updates

Despite signals look right, I can't still access to data.

these are the output signals.

UHPI_HCS always low

UHPI_HDS2 always High

UHPI_HDS1 is the internal strobe signal.

UHPI_HAS alaways high.

I also added the code to initialize the device:

/*System MMR Declaration*/
#define SYS_BASE 0x01C14000
#define CONFIGCHIP1 *(volatile unsigned int*)(SYS_BASE + 0x180) //PINMUX13
#define PINMUX13 *(volatile unsigned int*)(SYS_BASE + 0x154) //PINMUX13
#define PINMUX14 *(volatile unsigned int*)(SYS_BASE + 0x158) //PINMUX14
#define PINMUX15 *(volatile unsigned int*)(SYS_BASE + 0x15C) //PINMUX15
#define HPIC *(volatile unsigned int*)(0x1E10030)
#define HPIAW *(volatile unsigned int*)(0x1E10034)
#define HPIAR *(volatile unsigned int*)(0x1E10038)

/*
* Funzione di inizializzazione
*/
void InitializeHostport(){

/* Abilita Tensione ai Hostport */
PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_UHPI, PSC_POWERDOMAIN_ALWAYS_ON, PSC_MDCTL_NEXT_ENABLE);

/* Resetto i pinpux*/
PINMUX13 = 0x00000000;
PINMUX14 = 0x00000000;
PINMUX15 = 0x00000000;

/*
* SYSCFG è un modulo dell'omap che mi permette di definire la funzione dei pin del dispositivo.
*/

/* Configurazione dei bit di controllo indirizzi dell'Host port*/
ConfigurationModuleSetup(13, SYSCFG_PINMUX13_PINMUX13_23_20, SYSCFG_PINMUX13_PINMUX13_23_20_SHIFT, SYSCFG_PINMUX13_PINMUX13_23_20_UHPI_HCNTL1);
ConfigurationModuleSetup(13, SYSCFG_PINMUX13_PINMUX13_19_16, SYSCFG_PINMUX13_PINMUX13_19_16_SHIFT, SYSCFG_PINMUX13_PINMUX13_19_16_UHPI_HCNTL0);

/* Configurazione dei bit di chip select dell'Host port*/
ConfigurationModuleSetup(14, SYSCFG_PINMUX14_PINMUX14_3_0, SYSCFG_PINMUX14_PINMUX14_3_0_SHIFT, SYSCFG_PINMUX14_PINMUX14_3_0_NUHPI_HCS);

/* Configurazione dei bit Read\Write dell'Host port*/
ConfigurationModuleSetup(13, SYSCFG_PINMUX13_PINMUX13_31_28, SYSCFG_PINMUX13_PINMUX13_31_28_SHIFT, SYSCFG_PINMUX13_PINMUX13_31_28_UHPI_HRNW);

/* Configurazione dei bit per l'identificazione dei bit più significativi o meno significativi dell'Host port*/
ConfigurationModuleSetup(13, SYSCFG_PINMUX13_PINMUX13_27_24, SYSCFG_PINMUX13_PINMUX13_27_24_SHIFT, SYSCFG_PINMUX13_PINMUX13_27_24_UHPI_HHWIL);

/* Configurazione dei bit di strobe sugli indirizzi dell'Host port*/
ConfigurationModuleSetup(13, SYSCFG_PINMUX13_PINMUX13_3_0, SYSCFG_PINMUX13_PINMUX13_3_0_SHIFT, SYSCFG_PINMUX13_PINMUX13_3_0_NUHPI_HAS);

/* Configurazione dei bit di interrupt dell'Host port*/
ConfigurationModuleSetup(13, SYSCFG_PINMUX13_PINMUX13_15_12, SYSCFG_PINMUX13_PINMUX13_15_12_SHIFT, SYSCFG_PINMUX13_PINMUX13_15_12_NUHPI_HINT);

/* Configurazione dei bit di strobe sui dati dell'Host port*/
ConfigurationModuleSetup(13, SYSCFG_PINMUX13_PINMUX13_7_4, SYSCFG_PINMUX13_PINMUX13_7_4_SHIFT, SYSCFG_PINMUX13_PINMUX13_7_4_NUHPI_HDS2);
ConfigurationModuleSetup(14, SYSCFG_PINMUX14_PINMUX14_7_4, SYSCFG_PINMUX14_PINMUX14_7_4_SHIFT, SYSCFG_PINMUX14_PINMUX14_7_4_NUHPI_HDS1);

/* Configurazione del Databus dell'Host port*/
ConfigurationModuleSetup(16, SYSCFG_PINMUX16_PINMUX16_7_4, SYSCFG_PINMUX16_PINMUX16_7_4_SHIFT, SYSCFG_PINMUX16_PINMUX16_7_4_UHPI_HD0);
ConfigurationModuleSetup(16, SYSCFG_PINMUX16_PINMUX16_3_0, SYSCFG_PINMUX16_PINMUX16_3_0_SHIFT, SYSCFG_PINMUX16_PINMUX16_3_0_UHPI_HD1);
ConfigurationModuleSetup(15, SYSCFG_PINMUX15_PINMUX15_31_28, SYSCFG_PINMUX15_PINMUX15_31_28_SHIFT, SYSCFG_PINMUX15_PINMUX15_31_28_UHPI_HD2);
ConfigurationModuleSetup(15, SYSCFG_PINMUX15_PINMUX15_27_24, SYSCFG_PINMUX15_PINMUX15_27_24_SHIFT, SYSCFG_PINMUX15_PINMUX15_27_24_UHPI_HD3);
ConfigurationModuleSetup(15, SYSCFG_PINMUX15_PINMUX15_23_20, SYSCFG_PINMUX15_PINMUX15_23_20_SHIFT, SYSCFG_PINMUX15_PINMUX15_23_20_UHPI_HD4);
ConfigurationModuleSetup(15, SYSCFG_PINMUX15_PINMUX15_19_16, SYSCFG_PINMUX15_PINMUX15_19_16_SHIFT, SYSCFG_PINMUX15_PINMUX15_19_16_UHPI_HD5);
ConfigurationModuleSetup(15, SYSCFG_PINMUX15_PINMUX15_15_12, SYSCFG_PINMUX15_PINMUX15_15_12_SHIFT, SYSCFG_PINMUX15_PINMUX15_15_12_UHPI_HD6);
ConfigurationModuleSetup(15, SYSCFG_PINMUX15_PINMUX15_11_8, SYSCFG_PINMUX15_PINMUX15_11_8_SHIFT, SYSCFG_PINMUX15_PINMUX15_11_8_UHPI_HD7);
ConfigurationModuleSetup(15, SYSCFG_PINMUX15_PINMUX15_7_4, SYSCFG_PINMUX15_PINMUX15_7_4_SHIFT, SYSCFG_PINMUX15_PINMUX15_7_4_UHPI_HD8);
ConfigurationModuleSetup(15, SYSCFG_PINMUX15_PINMUX15_3_0, SYSCFG_PINMUX15_PINMUX15_3_0_SHIFT, SYSCFG_PINMUX15_PINMUX15_3_0_UHPI_HD9);
ConfigurationModuleSetup(14, SYSCFG_PINMUX14_PINMUX14_31_28, SYSCFG_PINMUX14_PINMUX14_31_28_SHIFT, SYSCFG_PINMUX14_PINMUX14_31_28_UHPI_HD10);
ConfigurationModuleSetup(14, SYSCFG_PINMUX14_PINMUX14_27_24, SYSCFG_PINMUX14_PINMUX14_27_24_SHIFT, SYSCFG_PINMUX14_PINMUX14_27_24_UHPI_HD11);
ConfigurationModuleSetup(14, SYSCFG_PINMUX14_PINMUX14_23_20, SYSCFG_PINMUX14_PINMUX14_23_20_SHIFT, SYSCFG_PINMUX14_PINMUX14_23_20_UHPI_HD12);
ConfigurationModuleSetup(14, SYSCFG_PINMUX14_PINMUX14_19_16, SYSCFG_PINMUX14_PINMUX14_19_16_SHIFT, SYSCFG_PINMUX14_PINMUX14_19_16_UHPI_HD13);
ConfigurationModuleSetup(14, SYSCFG_PINMUX14_PINMUX14_15_12, SYSCFG_PINMUX14_PINMUX14_15_12_SHIFT, SYSCFG_PINMUX14_PINMUX14_15_12_UHPI_HD14);
ConfigurationModuleSetup(14, SYSCFG_PINMUX14_PINMUX14_11_8, SYSCFG_PINMUX14_PINMUX14_11_8_SHIFT, SYSCFG_PINMUX14_PINMUX14_11_8_UHPI_HD15);

/* Configurazione dei bit ready per la comunicazione asincrona dell'Host port*/
ConfigurationModuleSetup(13, SYSCFG_PINMUX13_PINMUX13_11_8, SYSCFG_PINMUX13_PINMUX13_11_8_SHIFT, SYSCFG_PINMUX13_PINMUX13_11_8_NUHPI_HRDY);

/*NB per poter funzionare occorre abilitare il registro HPIENA=1 nel Config Chip 1*/
CONFIGCHIP1 = 0x00008000;

HPIC = 0x00000000;

}

Please Help me

nobody uses Host port interface on Omap l138?

Hi Mirco

Sorry for the late response on this, can you clarify what data memory/address you are trying to access via UHPI

Regards

Mukul

thank you

this is memory mapping for omap l138 pag 25 on sprs586d.

On my board are installed 128M Ddr ram, so it can be addressed from 0xc0000000 to 0xc8000000.

I tried to read and write in any memory address (DSP L2 Ram, DDR2, other register...).

Is there any memory address that is not accessible from the host port?

must Dma logic be have some different privileges level?

thank you.

Hi

You should not have issues accessing the DDR2 or DSP L2 memory, unless you have a software or hardware issue.

Perhaps see if the long discussion in this thread provides any clue

http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/88737/320381.aspx

There are some registers maps like the SYSCFG etc, that cannot be accessed by HPI, as they can only be accessed in privlieged mode, which UHPI does not have, however memory accessess should work.

I am assuming there are no issues with your DDR2 memory and initailzations and that you are able to access DDR2 memory with simplar ARM/DSP side functions, just not UHPI, correct?

Regards

Mukul

7752.HPI_problem.zip

this is my simplified code.

Thank you