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AM3894 - Display Subsystem - Powering Down DACs

Issue:

The documentation in the technical manual is unclear the procedure to power down the the Video DACs

Background:

In Section 3.2.6.3 of the Technical Reference Manual DAC Power Down Control states that "the power supply to the Video DACs can be powered down by configuring the HD_DAC_CTRL and SD_DAC_CTRL registers of the Device Configuration".  However,  Section 1.14.1.3.17 HD DAC Control Register and 1.14.1.3.21 SD DAC Control Register only contain a "Reset SD/HD DAC" bit and do not describe how to power down the DAC

Question:

Does the writing a 1 to the reset bit power down the DACs?

Link to documentation:

Tech Manual: http://www.ti.com/lit/ug/sprugx7/sprugx7.pdf

  • Hi Michael,
     
    It's definitely unclear. Moreover what you have found is replicated in the DM816X TRM. I also checked the DM814X TRM - the SD DAC there does have an OFFMODE bit in the control register, besides the reset bit.
     
    I think that the reset bit does what it's supposed to do - reset the DAC, judging from the value "1-0".
     
    This thread has been escalated to a lot of people, so I think you'll get a more definite answer soon.
     
    Best Regards
    Biser
  • Factory response:

    The HDVPSS outputs DAC power down signals, which can be controlled by writing to the following registers:

    SD-DACs:  Register SD_VENC_dacsel – bits [27:24]

    HD-DACs: Register HD_VENC_cfg0 – bits[9:7]