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SRIO between two C6678 EVM boards

Weiyi Tang
Prodigy 110 points

Hi,

Help needed on SRIO communication between two C6678 EVM boards.

We plan to use SRIO to connect FPGA and C6678. As a preparation step, I'm trying now to connect two c6678 EVM boards via SRIO. We use the example project “SRIO_LoopbackDioIsrexampleproject” as base software, which is found at C:\ti\pdk_C6678_1_0_0_20\packages\ti\drv\exampleProjects. Here are what we did and got:

1. The project runs ok on one EVM board with internal loopback.

2. Then we modified the code to do external loopback on one EVM board. It also runs ok. The changes made are:

replacing CSL_SRIO_SetLoopbackMode(hSrio, 0) with CSL_SRIO_SetNormalMode(hSrio, 0);

replacing CSL_BootCfgSetSRIOSERDESRxConfig (0, 0x01C40495) with CSL_BootCfgSetSRIOSERDESRxConfig (0, 0x00440495);

replacing CSL_BootCfgSetSRIOSERDESTxConfig (0, 0x00780795) with CSL_BootCfgSetSRIOSERDESTxConfig (0, 0x00180795);

3. For two board test, we run the similar code on both EVM boards. The differences are only device ID and the 1st board does tx and the 2nd board does rx. The connection between the two boards is: (board1)tx+ => (board2)rx+, (board1)tx- => (board2)rx-, (board2)tx+ => (board1)rx+, (board2)tx- => (board1)rx-. Only one lane is used.

When running, it doesn’t go as expected, and we got following error msg on these registers:

               SP0_ERR_STAT   = 0x00030301

               SP0_LM_RESP    = 0x00000000     occasionally 0x80000010

               SP0_ERR_DET     = 0x00000004

Do I miss anything or did I do something wrong?

Regards,

Weiyi

 

 

  • 0
    TI__Intellectual 2790 points

    Hello Weiyi

     

    How do you have these two C6678 EVM boards connected to one another? Did you place both on a chasis?

     

    Thank you,

    Elush Shirazpour

  • 0 in reply to Elush Shirazpour
    Prodigy 110 points

    Hi, Elush,

    We have two AMC-SMA ULTRA 9000 boards. Here is the link of the company which has pictures: http://silicontkx.com/SMA-AMCULTRA9000.html

    Each EVM connects to a AMC-SMA board, and the two AMC-SMA boards are connected by 4 SMA cables, the connection is as mentioned in my original email:

    (board1)tx+ => (board2)rx+, (board1)tx- => (board2)rx-, (board2)tx+ => (board1)rx+, (board2)tx- => (board1)rx-.

    BTW, I saw some post mentioned that they use a SRIO switch to connect two EVM boards. Do I need that?

    Regards,

    Weiyi

     

  • 0 in reply to Elush Shirazpour
    Prodigy 110 points

    Elush,

    Here are some other observation:

    The two EVM boards can both pass SRIO initialization to get PortOk. But right after that (the screen print out: Debug(Core 0): SRIO Driver has been initialized), the register SP0_ERR_STAT (0x0290b158) on both side goes to 0x00030301, and stay there forever. But if I do external loopback, that register is always 0x00000002.

    I also checked register SRIO_SERDES_STS (0x02620154), the last bit is 1 all the time. That means PLL is locked, right?

    I also tried to write 0x2003F044 to hSrioCSL->RIO_PLM[0].RIO_PLM_SP_LONG_CS_TX1. It doesn't help.

    Regards,

    Weiyi

  • 0 in reply to Weiyi Tang
    TI__Intellectual 2790 points

    Hello Weiyi,

     

    I will look into the problem and hopefully have an anwser for you shortly.

  • 0 in reply to Elush Shirazpour
    Prodigy 110 points

    Thanks, Elush. Appreciated.

     

  • 0 in reply to Elush Shirazpour
    Prodigy 110 points

    Elush,

    The first thing we'd like to know is whether our setup is valid. Do we really need to have a SRIO switch.

    Regards,

    Weiyi

     

  • 0 in reply to Weiyi Tang
    Prodigy 110 points

    Elush,

    The attached files are register values for different cases. Just for your references. The loopback case is the one which works. All tests are 2.5 Gbps.

    Weiyi

     

    Fullscreen 2425.reg_value_open_loopback_cable.txt Download 
    [C66xx_0] Executing the SRIO Unit Tests on the DEVICE
[C66xx_0] Debug(Core 0): System Initialization for CPPI & QMSS
[C66xx_0] Debug(Core 0): Queue Manager and CPPI are initialized.
[C66xx_0] Debug(Core 0): Host Region 0x82df50
[C66xx_0] SRIO_SERDES_STS=0x0c183061
[C66xx_0] SRIO_SERDES_CFGPLL=0x00000241
[C66xx_0] SRIO_SERDES_CFGRX0=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX0=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX1=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX1=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX2=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX2=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX3=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX3=0x001807a5
[C66xx_0] SRIO_SP0_ERR_STAT=0x00030301
[C66xx_0] SRIO_SP0_CTL=0x00600001
[C66xx_0] SRIO_SP1_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP1_CTL=0x00600001
[C66xx_0] SRIO_SP2_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP2_CTL=0x00600001
[C66xx_0] SRIO_SP3_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP3_CTL=0x00600001
[C66xx_0] SRIO_ERR_DET=0x00000000
[C66xx_0] SRIO_ERR_EN=0x00000000
[C66xx_0] SRIO_H_ADDR_CAPT=0x00000000
[C66xx_0] SRIO_ADDR_CAPT=0x00000000
[C66xx_0] SRIO_ID_CAPT=0x00000000
[C66xx_0] SRIO_CTRL_CAPT=0x00000000
[C66xx_0] SRIO_SP0_ERR_DET=0x00000004
[C66xx_0] SRIO_SP0_RATE_EN=0x00000000
[C66xx_0] SRIO_SP0_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP0_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP1_ERR_DET=0x00000000
[C66xx_0] SRIO_SP1_RATE_EN=0x00000000
[C66xx_0] SRIO_SP1_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP1_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP2_ERR_DET=0x00000000
[C66xx_0] SRIO_SP2_RATE_EN=0x00000000
[C66xx_0] SRIO_SP2_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP2_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP3_ERR_DET=0x00000000
[C66xx_0] SRIO_SP3_RATE_EN=0x00000000
[C66xx_0] SRIO_SP3_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP3_ERR_RATE=0x80000000
[C66xx_0] SRIO_PLM_SP0_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP0_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP0_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP0_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP1_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP1_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP1_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP1_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP2_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP2_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP2_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP2_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP3_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP3_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP3_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP3_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_TLM_SP0_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP0_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP0_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_TLM_SP1_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP1_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP1_BRR_0_CTL=0x84000000
[C66xx_0] SRIO_TLM_SP2_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP2_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP2_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_TLM_SP3_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP3_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP3_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_PBM_SP0_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP1_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP2_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP3_STATUS=0x00018000
[C66xx_0] After PortOK: SP0_ERR_STAT= 0x30302
[C66xx_0] Debug(Core 0): SRIO Driver has been initialized
[C66xx_0] loop forever...

    Fullscreen 2046.reg_value_evm1_to_emv2.txt Download 
    [C66xx_0] Executing the SRIO Unit Tests on the DEVICE
[C66xx_0] Debug(Core 0): System Initialization for CPPI & QMSS
[C66xx_0] Debug(Core 0): Queue Manager and CPPI are initialized.
[C66xx_0] Debug(Core 0): Host Region 0x82df50
[C66xx_0] SRIO_SERDES_STS=0x0c183061
[C66xx_0] SRIO_SERDES_CFGPLL=0x00000241
[C66xx_0] SRIO_SERDES_CFGRX0=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX0=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX1=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX1=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX2=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX2=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX3=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX3=0x001807a5
[C66xx_0] SRIO_SP0_ERR_STAT=0x00030301
[C66xx_0] SRIO_SP0_CTL=0x00600001
[C66xx_0] SRIO_SP1_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP1_CTL=0x00600001
[C66xx_0] SRIO_SP2_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP2_CTL=0x00600001
[C66xx_0] SRIO_SP3_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP3_CTL=0x00600001
[C66xx_0] SRIO_ERR_DET=0x00000000
[C66xx_0] SRIO_ERR_EN=0x00000000
[C66xx_0] SRIO_H_ADDR_CAPT=0x00000000
[C66xx_0] SRIO_ADDR_CAPT=0x00000000
[C66xx_0] SRIO_ID_CAPT=0x00000000
[C66xx_0] SRIO_CTRL_CAPT=0x00000000
[C66xx_0] SRIO_SP0_ERR_DET=0x00000004
[C66xx_0] SRIO_SP0_RATE_EN=0x00000000
[C66xx_0] SRIO_SP0_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP0_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP1_ERR_DET=0x00000000
[C66xx_0] SRIO_SP1_RATE_EN=0x00000000
[C66xx_0] SRIO_SP1_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP1_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP2_ERR_DET=0x00000000
[C66xx_0] SRIO_SP2_RATE_EN=0x00000000
[C66xx_0] SRIO_SP2_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP2_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP3_ERR_DET=0x00000000
[C66xx_0] SRIO_SP3_RATE_EN=0x00000000
[C66xx_0] SRIO_SP3_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP3_ERR_RATE=0x80000000
[C66xx_0] SRIO_PLM_SP0_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP0_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP0_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP0_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP1_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP1_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP1_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP1_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP2_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP2_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP2_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP2_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP3_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP3_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP3_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP3_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_TLM_SP0_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP0_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP0_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_TLM_SP1_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP1_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP1_BRR_0_CTL=0x84000000
[C66xx_0] SRIO_TLM_SP2_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP2_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP2_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_TLM_SP3_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP3_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP3_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_PBM_SP0_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP1_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP2_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP3_STATUS=0x00018000
[C66xx_0] After PortOK: SP0_ERR_STAT= 0x30302
[C66xx_0] Debug(Core 0): SRIO Driver has been initialized
[C66xx_0] loop forever...
     

  • 0 in reply to Weiyi Tang
    Prodigy 110 points

    missed one attach.

    Fullscreen 5432.reg_value_external_loopback.txt Download 
    [C66xx_0] Executing the SRIO Unit Tests on the DEVICE
[C66xx_0] Debug(Core 0): System Initialization for CPPI & QMSS
[C66xx_0] Debug(Core 0): Queue Manager and CPPI are initialized.
[C66xx_0] Debug(Core 0): Host Region 0x82df50
[C66xx_0] SRIO_SERDES_STS=0x00000041
[C66xx_0] SRIO_SERDES_CFGPLL=0x00000241
[C66xx_0] SRIO_SERDES_CFGRX0=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX0=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX1=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX1=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX2=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX2=0x001807a5
[C66xx_0] SRIO_SERDES_CFGRX3=0x004404a5
[C66xx_0] SRIO_SERDES_CFGTX3=0x001807a5
[C66xx_0] SRIO_SP0_ERR_STAT=0x00000002
[C66xx_0] SRIO_SP0_CTL=0x00600001
[C66xx_0] SRIO_SP1_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP1_CTL=0x00600001
[C66xx_0] SRIO_SP2_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP2_CTL=0x00600001
[C66xx_0] SRIO_SP3_ERR_STAT=0x00000001
[C66xx_0] SRIO_SP3_CTL=0x00600001
[C66xx_0] SRIO_ERR_DET=0x00000000
[C66xx_0] SRIO_ERR_EN=0x00000000
[C66xx_0] SRIO_H_ADDR_CAPT=0x00000000
[C66xx_0] SRIO_ADDR_CAPT=0x00000000
[C66xx_0] SRIO_ID_CAPT=0x00000000
[C66xx_0] SRIO_CTRL_CAPT=0x00000000
[C66xx_0] SRIO_SP0_ERR_DET=0x00000000
[C66xx_0] SRIO_SP0_RATE_EN=0x00000000
[C66xx_0] SRIO_SP0_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP0_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP0_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP1_ERR_DET=0x00000000
[C66xx_0] SRIO_SP1_RATE_EN=0x00000000
[C66xx_0] SRIO_SP1_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP1_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP1_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP2_ERR_DET=0x00000000
[C66xx_0] SRIO_SP2_RATE_EN=0x00000000
[C66xx_0] SRIO_SP2_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP2_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP2_ERR_RATE=0x80000000
[C66xx_0] SRIO_SP3_ERR_DET=0x00000000
[C66xx_0] SRIO_SP3_RATE_EN=0x00000000
[C66xx_0] SRIO_SP3_ERR_ATTR_CAPT_DBG0=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG1=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG2=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG3=0x00000000
[C66xx_0] SRIO_SP3_ERR_CAPT_DBG4=0x00000000
[C66xx_0] SRIO_SP3_ERR_RATE=0x80000000
[C66xx_0] SRIO_PLM_SP0_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP0_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP0_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP0_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP1_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP1_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP1_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP1_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP2_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP2_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP2_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP2_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_PLM_SP3_IMP_SPEC_CTL=0x00000000
[C66xx_0] SRIO_PLM_SP3_STATUS=0x00000000
[C66xx_0] SRIO_PLM_SP3_PATH_CTL=0x00000400
[C66xx_0] SRIO_PLM_SP3_DENIAL_CTL=0x30000000
[C66xx_0] SRIO_TLM_SP0_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP0_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP0_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_TLM_SP1_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP1_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP1_BRR_0_CTL=0x84000000
[C66xx_0] SRIO_TLM_SP2_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP2_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP2_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_TLM_SP3_CONTROL=0x00009000
[C66xx_0] SRIO_TLM_SP3_STATUS=0x00000000
[C66xx_0] SRIO_TLM_SP3_BRR_0_CTL=0x05000000
[C66xx_0] SRIO_PBM_SP0_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP1_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP2_STATUS=0x00018000
[C66xx_0] SRIO_PBM_SP3_STATUS=0x00018000
[C66xx_0] After PortOK: SP0_ERR_STAT= 0x2
[C66xx_0] Debug(Core 0): SRIO Driver has been initialized
[C66xx_0] loop forever...

  • 0 in reply to Weiyi Tang
    TI__Intellectual 2790 points

    Weiyi,

     

    You do not need a SRIO switch to connect the two C6678 EVM boards.

     

    Elush

  • 0 in reply to Elush Shirazpour
    Prodigy 90 points

    Hi Weiyi,

    Poly-Platform is a set of tools and runtime modules to simplify the communications between multicore applications running on multicore devices and between devices.  SRIO is supported.   The tools configure the communications over Shared Memory or SRIO, making the communications transparent to the application software.

    Please feel free to contact me for more information at Ted.Gribb@PolyCoreSoftware.com

    Ted