Troubles with SRIO DirectIO using LSU level access

Marty

I have problems using NREAD.

I have a somewhat vague problem description, but some general advices would be welcome.

I'm using DirectIO with a C6678 using direct LSU register access, from Core 0 only, using LSU1 only. The remote side is an FPGA.

Although the FPGA seems to be responding correctly, it seems that the DSP's peripheral is writing (dma) all zeroes into the receive buffer. I have tried to look for problems with cache, buffer alignment (always 16 bytes in my case), and size (always 8 bytes in my case) but fail to see what's causing the error.

I also think that the registers LSUx_Reg0..LSUx_Reg6 are a bit strange, the spec doesn't clearly say how/when/if each field/register can be read back. For example, the byte_count in Reg3 cannot be read, is always 0 despite me writing 0x8 to it??? And, after having sent a message the address seems to have been increased?? I probably shouldn't worry about that, or?

BR, Marty

over 13 years ago

0 Elush Shirazpour over 13 years ago

TI__Intellectual 2790 points

Hello Marty

I will look into it and hopefully have an anwser for you shortly.

Thank you

Elush

0 Elush Shirazpour over 13 years ago

TI__Intellectual 2790 points

Hi Marty

What FPGA are you using?

Yes, you can read the values of LSU0-6 registers. Under the SRIO User Guide under the Direct I/O Operation Section, "The point at which the data is actually transferred from the shadow registers to the actual LSU registers, the values of LSU0-5 registers can be read. Prior to that, a read of these registers will indicate the last value that was present in these registers. This implies that the new values cannot be read until a write to REG5 and further constrained by the fact that there is no other command ahead of the current command being setup. Reg6 can be read as and when it is written to, as it is used for locking and releasing."

0 Elush Shirazpour over 13 years ago

TI__Intellectual 2790 points

Marty,

There are many possibilities that can be wrong. Can I have more information?

One possible error is a sync error. Please refer to this forum for more information. http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/170339/622561.aspx#622561

Thanks

Elush Shirazpour

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Troubles with SRIO DirectIO using LSU level access