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NAND Flash BCH8 Coding in U-boot

Dirk Bredenbals
Prodigy 40 points

Hello,

we develop a custom board with an AM335x processor and a NAND Flash chip with 8x512 bytes sector size and 224 bytes oob sector size addon.

When the CPU accesses the NAND flash chip from U-boot, ECC errors occur while reading.

In a test case, I removed the ECC correction from the u-boot code, then data is written and read correctly. So it seams that the ECC error correction works with corrupt data.

The NAND flash is an ONFI Flash chip and is detected correctly. The sitara version we use is 05.05.04.01.

Thanks for helping.

Best regards

Dirk B.

  • 0
    TI__Expert 5745 points

    Hi Dirk,

    Two questions just to make sure we're on the same page:

    1) How are you flashing the NAND and setting the ECC, CCS and the flash utility? Are you setting the ECC to BCH8 with the utility?

    2) Have you made sure that your SYSBOOT[9] pin is configured correctly per the TRM? (from Table 26-7: SYSBOOT[9] is 0 for ECC done by ROM, 1 is ECC done by NAND)

     

    Best,

    Keegan

  • 0 in reply to Keegan@TI
    Prodigy 40 points

    Solved:

    That helped. it was the sysboot 9 configuration.

    For that special NAND I also had to change some NAND specifics that were hard implemented in:

    arch/arm/include/asm/arch-ti81xx/nand.h

    GPMC_NAND_HW_BCH8_ECC_LAYOUT

    andin drivers/mtd/nand/ti81xx_nand.c:

    nand->ecc.steps

    Now it works. Thank you very much

    And nice day!

    Dirk

  • 0 in reply to Dirk Bredenbals
    Prodigy 75 points

    I'm facing the same problem with a 2Gbit NAND x8 device: (2048 + 64 spare) bytes.

    SYSBOOT[9] are you using 0 or 1? In my case I’m using 1 letting the NAND deal with the ECC.

    In my u-boot code GPMC_NAND_HW_BCH8_ECC_LAYOUT look like:

    #define GPMC_NAND_HW_BCH8_ECC_LAYOUT {\

        .eccbytes = 56,\

        .eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\

                    16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\

                    28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\

                    40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\

                    52, 53, 54, 55, 56, 57},\

        .oobfree = {\

            {.offset = 58,\

             .length = 6 } } \

    }

    Could you point the modifications that you did on the ECC Layout?

  • 0 in reply to Roger45637
    Prodigy 40 points

    Hi Roger

    let the ROM do the ECC.

    If it is an ONFI NAND, check if onfi detection is enabled: add

    #define CONFIG_SYS_NAND_ONFI_DETECTION

    to your BSP in include/configs/... .h

    your GPMC_NAND_HW_BCH8_ECC_LAYOUT could be right ...

    Best regards

    Dirk

  • 0 in reply to Dirk Bredenbals
    Prodigy 75 points

    Thanks Dirk for your kick answer!

    I’ll try your suggestions. I’m using a very standard NAND from Micron so I think the layout is right too. I need to solder back the resistor to change SYSBOOT[9] to 0 again. I’m using a beaglebone with a custom board attached with the NAND.

    Best regards,

    Roger

  • 0 in reply to Roger45637
    Prodigy 40 points

    I have also identical issue. The BCH8 version I generate is different from what the processor generates!

  • 0 in reply to AllanJ
    Prodigy 230 points

    What should be the boot configuration or option I have to provide from below,  if I am planning to use below for booting devices and there sequence :

    1.USB 

    2. uSD (MMC0)

    3. FLASH memory from Micron which also used in Begle Bone Black (MMC1)

    4. Ethernet

    I am also able to give jumper provision if required.

    Boot Sequence                                [15:14]  [13:12] [11:10] [9]         [8]         [7:6]      [5]         [4:0]

    UART0 - XIP - MMC0 - NAND      01           00           00           0              0              00           1              00100

    MMC1 - MMC0 - UART0 - USB0 01           00           00           0              0              00           1              11100

    USB0 - NAND - SPI0 - MMC0       01           00           00           0              0              00           1              01011

    EMAC1 - MMC0 - XIP - NAND     01           00           00           0              0              00           1              00111

    Regards,

    Vikas