Send NULL packet

Hi,

I have enabled sending Long Null packet in command mode.

But, still I don't see DSI Clock

Thank You & Regards,

GSR

What release are you using? Is this DSI1 or DSI2?

For enabling DSI Clock, this should work:

1.- Enable a Virtual Channel (shouldn't matter which one) configured as High-Sped Command Mode.

2.- Send null packet by writing 0x0 to the corresponding DSI_VC_SHORT_PACKET_HEADER register.

After this, DSI Clock should start running. Shouldn't matter if the VC is disabled after that, DSI Clock should remain ON.

Current DSI Video Mode code already does this method, but as it is using a separate High-Speed Command Mode VC, this is not only for DSI Video Mode.

Hi,

Thank You for your time and the reply.

I am able to transfer a NULL Packet in command mode.

Now, I want to perform this in video mode. But when I try to send it in video mode the packet transfer fails.

Can I have a minimal set of initialization sequence that need to be done to send long null packet and then continuous data from DSI to the DSI bridge.

I see that in blaze board it is being sent three times. But, I want to send it continuously since there is no frame buffer in our hardware from DSI output to display panel.

Regards,

GSR 

Hi Jorge,

Thanks for the reply.

I remembered that I have accessed a week or two weeks ago.

But, now if I try to access the same URL it lands in wlan code.

can you give me the URL once again.

Regards,

GSR

Hi Gina,

Thank you for the URL.

I am able to download the code.

Regards,

GSR

Hi,

I wanted to see DSI Clock first in HS Mode.

So I took this code and enabled upto the statement

   /* Send null packet through VC0 to start DDR clock  */

It was able to break the for loop.

If i print i value it shows 123. But I don't see any HS Clock on Lane 1.

I also tried sending in a while loop sending null packet. But, with that change the first packet is sent but after that it gives timeout error.

What am I missing to get the clock.

Before calling initDisplay do we need to make sure any other clocks to be enabled?

Thanks for your time.

Regards,

GSR

Hi,

The register dump for DSI and DIPSC is as follows:

Display error: null packet timed out on vc0
DSI PLLRegisters:
DSI_PLL_CONTROL = 0x00000000
DSI_PLL_STATUS = 0x00000383
DSI_PLL_GO = 0x00000000
DSI_PLL_CONFIGURATION1 = 0x20a3724c
DSI_PLL_CONFIGURATION2 = 0x00656008
DSI_PLL_CONFIGURATION3 = 0x00000000
DSI_PLL_SSC_CONFIGURATION1= 0x00000000
DSI_PLL_SSC_CONFIGURATION2= 0x00000000
DSI_PLL_CONFIGURATION4 = 0x00000000

DSI PLLRegisters:
DSIPHY_REGISTER0 = 0x12291321
DSIPHY_REGISTER1 = 0x4206103a
DSIPHY_REGISTER2 = 0xb800000f
DSIPHY_REGISTER3 = 0x625d21a0
DSIPHY_REGISTER4 = 0x625d21a0
DSIPHY_REGISTER5 = 0xe5000000

DSI PE Registers
DSI_SYSCONFIG = 0x00000001
DSI_SYSSTATUS = 0x00000001
DSI_IRQSTATUS = 0x00004080
DSI_IRQENABLE = 0x0015c000
DSI_CTRL = 0x00eaea98
DSI_GNQ = 0x01926936
DSI_COMPLEXIO_CFG1 = 0x6a000093
DSI_COMPLEXIO_STATUS = 0x00000000
DSI_COMPLEXIO_ENABLE = 0xffffffff
DSI_CLK_CTRL = 0xa0346005
DSI_TIMING1 = 0x7fff7fff
DSI_TIMING2 = 0x7fff7fff
DSI_VM_TIMING1 = 0x00006015
DSI_VM_TIMING2 = 0x04040404
DSI_VM_TIMING3 = 0x031e0300
DSI_CLK_TIMING = 0x00000101
DSI_TX_FIFO_VC_SIZE = 0x13121110
DSI_RX_FIFO_VC_SIZE = 0x13121110
DSI_COMPLEXIO_CFG2 = 0x00000000
DSI_RX_FIFO_VC_FULLNESS = 0x00000000
DSI_VM_TIMING4 = 0x00000000
DSI_TX_FIFO_VC_EMPTINESS = 0x00000000
DSI_VM_TIMING5 = 0x00000000
DSI_VM_TIMING6 = 0x00000000
DSI_VM_TIMING7 = 0x0012000f
DSI_STOPCLK_TIMING = 0x00000080
DSI_CTRL2 = 0x00000100
DSI_VM_TIMING8 = 0x00000000
DSI_CTRL2 = 0x00000100
DSI_VM_TIMING8 = 0x00000000

DSS Registers:
DSS_REVISION = 0x00000040
DSS_SYSSTATUS = 0x00000001
DSS_CONTROL = 0x00000003
DSS_STATUS = 0x0000ab21

DISPC Registers:
DISPC_REVISION = 0x00000040
DISPC_SYSCONFIG = 0x00002015
DISPC_SYSSTATUS = 0x00000001
DISPC_IRQSTATUS = 0x00000000
DISPC_IRQENABLE = 0x0012d640

DISPC Registers (Control):
DISPC_CONTROL = 0x00018308
DISPC_CONFIG = 0x00020004
DISPC_CAPABLE = 0x00000000
DISPC_DEFAULT_COLOR0 = 0x00ffffff
DISPC_DEFAULT_COLOR1 = 0x00000000
DISPC_TRANS_COLOR0 = 0x00000000
DISPC_TRANS_COLOR1 = 0x00000000

DISPC Registers (LCD):
DISPC_LINE_STATUS = 0x00000000
DISPC_LINE_NUMBER = 0x00000000
DISPC_TIMING_H = 0x00900913
DISPC_TIMING_V = 0x00400403
DISPC_POL_FREQ = 0x00000000
DISPC_DIVISOR = 0x00010002
DISPC_SIZE_DIG = 0x00000000
DISPC_SIZE_LCD = 0x02ff03ff

DISPC Registers (GFX):
DISPC_GFX_BA0 = 0x00000000
DISPC_GFX_BA1 = 0x00000000
DISPC_GFX_POSITION = 0x00000000
DISPC_GFX_SIZE = 0x00000000
DISPC_GFX_ATTRIBUTES = 0x000000a0
DISPC_GFX_FIFO_THRESHOLD = 0x04ff04f8
DISPC_GFX_FIFO_SIZE_STATUS = 0x00000500
DISPC_GFX_ROW_INC = 0x00000001
DISPC_GFX_PIXEL_INC = 0x00000001
DISPC_GFX_WINDOW_SKIP = 0x00000000
DISPC_GFX_TABLE_BA = 0x00000000

Please let me know what else is missing.

Regards,

GSR

Can you please provide more specifics about both what you are doing and how you are doing it. 

Hi,

Do you have a minimum time where you want the clock to be on before the data is sent?

on OMAP4 you have can handle DDR_CLOCK by two mean:

• Enable DDR_CLK_ALWAYS_ON in DSI_CLK_CTRL[13] ==> The HS clock will always be on even if you are not transmitting.
• Set DDR_CLK_PRE long enough ==> This DSI parameters determine the time between CLK HS ready and start of DATA lane transtionning to HS. You have full details in section 10.3.4.4.4 Clock Requirements. All timings settigns need to Sw coded. No HW checks is done.

Thanks
Erwan,

Hi,

Null packets can be sent in CMDS mode and Video mode. The only difference for video mode is that this packet will have to be sent during blanking period (vertical and/or horizontal if long enough)  if video mode is already enable. This action require to enable interleaving.

Thanks
Erwan,