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Problems about DDR3 initialization

Hi everyone,

        According to the Errata(C6678) advisory 9, we must choose partial automatic leveling when doing DDR3 initialization.

But the instance i encounter isn't the same with that.

1. If I execute partial automatic leveling only, the DDR memory controller status register at address 0x21000004 will be set to 0x40000074,

which indicates that leveling which indicates has failed.

2. If I enable incremental leveling with partial automatic leveling as DDR3 Initialization App Note V1_1.pdf shows,

the DDR memory controller status register will be  set to 0x40000024. The leveling has failed again.

Incremental leveling with partial automatic leveling  :

RDWR_LVL_RMP_WIN = 0x00000502;

 RDWR_LVL_RMP_CTRL = 0x80000303;

RDWR_LVL_CTRL = 0xFF000909;

2. If I enable incremental leveling with Full automatic leveling as DDR3 Initialization App Note V1_1.pdf shows,

the DDR memory controller status register will be  set to 0x40000004. It seems infract the errata.

And in this case,half of the DDR3 address space can't be written into although the value of Status register is correct.

Addresses such as 0x8000 0000 + n*0x8(n = 0,1,2,3...) can be written into,

while address such as 0x8000 0004 + n*0x8(n = 0,1,2,3...)  do not.

Incremental leveling with Full automatic leveling :

RDWR_LVL_RMP_WIN = 0x00000502;

 RDWR_LVL_RMP_CTRL = 0x80030303;

RDWR_LVL_CTRL = 0xFF090909;

I have followed DDR3 Initialization App Note V1_1.pdf step by step.

IS there some solutions to solve this problem?Hope you can help. Thank you in advance.

PS:Information about my configuration:

DDR clock rate : 400MHz or 666.67MHz( Both the two rates have this problem)

Data width : 64 bits

 

  • Hope someone can help me.

  • Hi Nuoxi,

    try to follow the steps described in sprabl2 closely. Fill out the spreadsheet and use the values from the sheet in your code.

    We had no problems after following these steps. Keep in mind that there are preproduction samples from the processor named TMX... that might require a second initialization.

    I hope this helps

    - Peter

  • Hi Peter,

        I am sorry for the delay. Some hardware problems are determined to be the cause of the failure.

    Thanks for your kind help . 

    Nuoxi

    Best Regards

     

  • Hi Nuoxi,

                  We are currently working in the customized C6678 board. We are also facing the same issue in accessing the DDR3 particular memory location. And We have

    checked for the error status from the DDR memory controller status register. The DDR memory controller status register will be  set to 0x40000004. It seems infact the errata.

    And in this case,half of the DDR3 address space can't be written into although the value of Status register is correct.

    Addresses such as 0x8000 0000 + n*0x8(n = 0,1,2,3...) can be written into,

    while address such as 0x8000 0004 + n*0x8(n = 0,1,2,3...)  do not.

    In The final conversation you have mentioned that you faced some hardware problems.


    Can you please tell us what sort of hardware issues you face? So, that I can check in our customized board We made the hardware issue.

    can you also provide the GEL file you used for your customized board.


    Thanks in advance.



    Regards,

    Avinash N