I configure McBSP3 on OMAP3530. A block of data has to be sent through McBSP3 by using interrupts. For example, when the word is sent from McBSP, the interrupt occurs and processor loads the next word into DXR. The described configuration is given below:
RCR2 0x0101
RCR1 0
XCR2 0x101
XCR1 0x0
SRGR2 0x003F
SRGR1 0x1F5A
PCR0 0x0A00
XCCR 0x1008
SPCR2 0x00c7
SPCR1 0x0001
XCCR 0x1008
irq enable 0
Even if I write nothing in DXR, processor starts continuously generating an interrupt (IRQ status 0x400 McBSP3_IRQ_TX (M_IRQ89)) after SPCR2.xrst (transmitter starts) is being set. Processor doesn't stop interrupting, so I can't reset it. Why an interrupt occurs when the irq_enqble value equales to zero (irq_enqble=0)? How can it be reset?