Incomplete display on LCD screen

li zhang1

Hi everbody,

I have a promble in developing the LCD framebuffer driver on DM355. Our board is not the DM355-EVM. And the board is made by us based on the DM355-EVM, supporting for LCD output. The DVSDK version is DVSDK3.10, and the kernel is LINUX2.6.32. Our LCD screen is TFT320240-91-E.

When I changed the bootargs to"mem=96M console=ttyS1,115200n8 root=/dev/ram0 rw initrd=0x82000000,15M ip=10.10.101.119:10.10.104.138:10.10.101.20:255.255.255.0:::off eth=00:01:02:03:04:06 video=davincifb:osd0=320x240x16:osd1=320x240:vid0=320x240x8:vid1=320x240x8 davinci_enc_mngr.ch0_output=LCD davinci_enc_mngr.ch0_mode=ntsc vpfe_capture.interface=1", boot the kernel, then the booting image can't incomplete display on LCD screen, as the first photo show. The complete image should like the second the photo, when analog output( changed the red part in bootargs,to "davinci_enc_mngr.ch0_output=COMPOSITE" ).

What are the reasons for incomplete display on LCD screen? Any suggestions will be thank for !!

Fig 1 the first photo

Fig. 2 the second photo

over 12 years ago

0 Renjith Thomas over 12 years ago

Guru 31670 points

Li,

Have you removed "davinci_enc_mngr.ch0_mode=ntsc" and tried out? I'm not sure about the right value of it, it should be something custom to LCD.

0 li zhang1 over 12 years ago in reply to Renjith Thomas

Prodigy 50 points

Thank you! Yes，I have tired that. But it doesn't work. The result is shown in the following picture. I want to know that what possible reasons or factors may result in this situation.

0 Renjith Thomas over 12 years ago in reply to li zhang1

Guru 31670 points

Li,

Can you set bits 8 and 9 in the register "VDPRO" inside venc module of VPBE, and see whether you are able to see color bar completely or not. If the color bar is coming only on the top, you can confirm that the timings and the VENC register settings are wrong.

0 li zhang1 over 12 years ago in reply to Renjith Thomas

Prodigy 50 points

I did as you said. The color bar is coming only on the top. I will confirm the VENC register settings. By the way, what is based on the timing setting. Thank you!

0 Renjith Thomas over 12 years ago in reply to li zhang1

Guru 31670 points

I meant LCD panel timings to be configured properly. But it looks like that you've not configured the number of vertical lines properly.

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Incomplete display on LCD screen