C6678 can not link up with PHY device, Why?

Hi All:

There is another difference between our boards and the C6678 demo.

We connect the PHY device to SGMII0 of C6678,but PHY device connected to SGMII1 on C6678 demo.

Hi Chad:

Is it right if we only change the PLL configuration register to 0x00000081 if our input clock of SGMII interface is

156.25MHz ? 

Since our PHY is BCM5461, not 88E1111 as on the C6678 demo.

Should there be some other changes on the C code of demo provided by TI?

Do you have some suggests  on how to solve the problem?

Hi Jason,

For a 156.25mhz SERDES refclk the register cfg values should be as follow:

#define SGMII_SERDES_CFGPLL_VAL 0x00000081
#define SGMII_SERDES_CFGRX_VAL 0x00700621

#define SGMII_SERDES_CFGTX_VAL 0x000108A1

The interface that should be connected to BCM5461 is SGIN/SGOUT to the SGMIITX/RX.

What specific demo are you modifying? The values of SGMII control and MR_ADV_ABILITY registers should both be set to 0x1. The order of setup should be:

1) UNLOCK BOOT CFG REG

2) SERDES CFG PLL

3) Wait for SERDES PLL LOCK

4) SERDES TX & RX CFG

5) LOCK BOOT CFG REG

6) SET SGMII CONTROL then MR_ADV_ABILITY registers.

7) SET then CLEAR SGMII auto-negotiation restart

After step 7) SGMII link should come up and auto-negotiation should complete. This assumes that  BCM5461 is setup for 10Base-T/100Base-TX or 1000Base-T (full-duplex only; half-duplex is not supported by Keystone 1 CPSW).

If BCM5461 is getting a link up and succesfully negotiation with the media side I would suggest to revisit the BCM5461 configuration (in the C6678 EVM board Marvel 88E11111 has HW configuration so it does not require SW configuration unless it is wished to be forced to some specific mode). Make sure it is set for the above mentioned Copper modes. Also verify the eletrical interface connection make sure it follows standard and BCM5461 specifications.

Regards,

Javier

Can you please check with broadcom and make sure that your PHY configuration are correct? Also can you make sure that C6678 internal SERDES loopback works?

Thanks,

Arun.

Hi all,

we have designed a c6678 board based on the EVM6678, but we use a Broadcom BCM5461S phy instead Marvel and have it connected to SERDES port 0 instead of port 1 (which is connected to an FPGA but currently not used),The SRIO/SGMII clock input frequency is 156.25MHz istead of 312.5MHz on C6678 demo board;

So far, the SGMII link between phy and C6678  come up.

I use PC as a sevice ,6678 board as a client ,when 6678 board connect to the PC,it fails.

I want to know how this happen? what can I do ?

thanks,

wang 

Seeing that these two threads seem very closely related, I've merged them into one thread.

Best Regards,

Chad

We have checked the PHY device status register of BCM5461,  line side and  MAC side all link up with line side working in 100M full-duplex mode.

But still,  we can not send out any packet through the ethernet port.

Can you give us some suggestion on how to solve the problem?  Thank you very much.

hi,Arun

I want to make sure whether C6678 internal SERDES loopback works or not.so I use the follow code with the 6678 demo board.

 I  found a .c file in the path "TEXES Instruments\mcsdk_2_00_09_21\demos\hua\src\benchmark\ndkloopback.c",

but I cannot found the related project file ,so I move ndkloopback.c to my project and build successed .

but when I run my project ,it cannot work,

this is my code:

void configserdes()

{

      CSL_SGMII_STATUS  sgmii_status;

      CSL_BootCfgUnlockKicker();

     CSL_BootCfgSetSGMIIConfigPll(0x00000041);

    Delaycycles(100);     

      do

       {

                  CSL_SGMII_getstatus（0，&sgmii_status）;

       }while(sgmii_status.bIsLocked !=1)

      do

       {

                  CSL_SGMII_getstatus（1，&sgmii_status）;

       }while(sgmii_status.bIsLocked !=1)

        CSL_BootCfgSetSGMIIRxConfig(0,0x03700621);//3 means loopback

       CSL_BootCfgSetSGMIIRxConfig(1,0x03700621);//3 means loopback

        CSL_BootCfgSetSGMIITxConfig(0,0x003108A1);//3 means loopback

       CSL_BootCfgSetSGMIITxConfig(1,0x003108A1);//3 means loopback

        CSL_BootCfgLockKicker();

}

void init_sgmii(uint32_t macPortNum)

{

        CSL_SGMII_ABVABILITY  sgmiiCfg;

        CSL_SGMII_STATUS  sgmii_status;

        CSL_SGMII_doSoftReset(macPortNum);

        while(CSL_SGMII_getSoftResetStatus(macPortNum)!=0};

       if(macPortNum ==1)

       {

                    CSL_SGMII_startRxTxSoftReset(macPortNum);

                    CSL_SGMII_disableMasterMode(macPortNum);

                     CSL_SGMII_enableAutoNegotiation(macPortNum);

                    CSL_SGMII_enableLoopback(macPortNum);

                   CSL_SGMII_endRxTxSoftReset(macPortNum);

                   while(1)

                   {  

                                      if(CSL_SGMII_IsLoopbackModeenabled((macPortNum))

                                    {

                                                  break;

                                       }

                        }

                      sgmiiCfg.linkSpeed = CSL_SGMII_1000_MBPS;

                      sgmiiCfg.duplexMode= CSL_SGMII_FULL_DUPLEX;

                      CSL_SGMII_setAdvAbility(macPortNum,&sgmiiCfg);

                   do

                     {

                                           CSL_SGMII_getstatus（macPortNum，&sgmiiStatus）;

                          }while(sgmiiStatus.bIsLinkUp !=1)//in my project  ,when I run,sgmiiStatus.bIsLinkUp =0;and I force sgmiiStatus.bIsLinkUp =1

                do

                 {

                                      CSL_SGMII_getstatus（macPortNum，&sgmii_status）;

                      }while(sgmii_status.bIsAutoNegComplete !=1)

        }

        else

         {

                  .....................................

          }

}

TCP_perform_receive()

{

           bind(stcp,,,,,,);

           listen(stcp,...................);

          stcp_child = accept(stcp,..............);//in my project  ,when I run,accept will block ,and connot run over          

}

Is something I do wrong?

Is other code  or project for C6678 internal SERDES loopback ?

thanks,

wang

Hi Jason, are you saying you get SGMII link up and auto-negotiation complete on 6678 side?

I would look in the CPSW stats to see if packets are reaching the MAC modules or they are being dropped (along with any other potential issues). Does BCM5461 have PHY stub loopback? You may try that first to isolate any other issues.

If you still can't get auto-negotiation or link up then I would suggest revieiwing the elictral interface specification and requiremetns of both the PHY and our device and making sure they are met. Assuming proper software configuration and I see you are using an approved mode 100Base-TX full-duplex, the link should come up and negotiation should complete.

Regards,

Javier

Hello, Javier,

I also designed a board based on EVM6678, and also used the 88E1111 and SGMII1. I test the GE demo, and MAC, SGMII, SERDES are all passed successfully. But I test the platform_init(), SGMII is not link up.You gave 7 steps to set the interface, I don't know how to realize step7, can you give more details? Thank you!!!