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RGB666 Panel Pixel clock question (delay pixel clock timing few ns second)

wu william
Intellectual 460 points

Hi~~

We have a problem here.

C1 (Yellow Line) is Pixel Clock

C2 (Red Line) is Pixel Data

Develop platform is PandaBoard. 

The frame shown on panel is unclear (seems like pixel data haven't catch correct).

Data will be caught when clock on rising.

But data will catch fail when data line and clock line intersect.

Could we shift pixel clock timing from A (10ns 11ns 12ns ...) to B (10.5ns 11.5ns 12.5ns ...) by setting OMAP register??

thank you.

  • 0
    Guru 31670 points

    William,

    Changing the polarity of display clock might help. But what is the pixel clock configured? Can you post the image that you are seeing on the panel? What is the panel part number?

  • 0 in reply to Renjith Thomas
    Intellectual 460 points

    Hi Thomas

     

    Thanks your quick answer.

    We have used ILI9486 Panel.

    It's workable now.

    The most important setting is that panel scaning direction.

    Original direction is right to left (S960 -> S1) , and the frame inverse.

    We have modify the register value, the direction change from left to right (S1 -> S960).

    and changeing the polarity of pixel clock from rising catch to falling catch.

     

    thank you.