HI,
Let me make sure that, data width of FIFO on McBSP (on L138) is always 32bit, isn't it?
So I think that, for example when McBSP transfer element size is 8 bit, data request to DMA will be 32bit, then bus efficiency will be down to 25% ( valid 1 byte, & 3 bytes will discarded) , right? And in other words, data element size should be 32bit when FIFO is enabled?
best regards,
Hirofumi Fujita