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About DM8148 Clock Generator Terminal Functions

Other Parts Discussed in Thread: TLV320AIC3120

Hi,

       The DM8148 Clock Generator Terminal Functions have 4 pin of 2 port.

  Q1. If the use pin AG17 for VIN[0]A and AE17 for VIN[0]B,the pin R26 and pin J7 can set output to driver other devices?

  Q2. if use pin R26 or pin J7 to driver tlv320aic3120 MCLK ,how to set the clock frequency to 12.288MHz?

  Q3. If not use pin R26 or pin J7,How can set the McASP0 Port pin MCA[0]_ACLKX out clock frequency to 1.536MHz?

  • Hi Huang,

    Pins J7 and R26 can be set to output (CLKOUT0/1) and thus drive the TLV320AIC3120.

    We can set the CLKOUT0/1 to 20MHz, 12.288 MHz will be hard task (if even possible). From the TLV320AIC3120 datasheet:

    5.7.1 PLL

    The PLL input supports clocks varying from 512 kHz to 20 MHz and is register-programmable to enable generation of required sampling rates with fine resolution.

    So, does 20MHz to CLKOUT0/1 (J7/R26) work for you?

    Best Regards,

    Pavel