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nor flash support on am3358 evm

Other Parts Discussed in Thread: AM3358, SYSBIOS

Hi experts,

As we know that am3358 evm doesn't support boot from nor, but I'd like to operate the nor flash via my nor driver in JTAG mode.

I belive that my nor driver is correct, since it can operate the same nor flash on other targets. The reason it failed on am3358 I think is:

1.pin mux set

2.clock set

I set the profile#3 (1100) for nor flash, could anyone share me the config of the pins and clock ?

Thanks!

  • More details.

    I select profile#3.(1on 2on 3off 4off)

    sysboot[4:0] = 11010

    sysboot[5] = 1 or 0 , tried both of them

    sysboot[8] = 1 , it means 16bit

    sysboot[11:10] = 00, it means non-muxed device

    sysboot[15:14] = 00 01 10 11 , I tried all of them

    And I also ocnfiged the pin mux according to uboot as below:

    #ifdef CONFIG_NOR
    static struct module_pin_mux nor_pin_mux[] = {
        {OFFSET(lcd_data0), MODE(1) | PULLUDEN},    /* NOR_A0 */
        {OFFSET(lcd_data1), MODE(1) | PULLUDEN},    /* NOR_A1 */
        {OFFSET(lcd_data2), MODE(1) | PULLUDEN},    /* NOR_A2 */
        {OFFSET(lcd_data3), MODE(1) | PULLUDEN},    /* NOR_A3 */
        {OFFSET(lcd_data4), MODE(1) | PULLUDEN},    /* NOR_A4 */
        {OFFSET(lcd_data5), MODE(1) | PULLUDEN},    /* NOR_A5 */
        {OFFSET(lcd_data6), MODE(1) | PULLUDEN},    /* NOR_A6 */
        {OFFSET(lcd_data7), MODE(1) | PULLUDEN},    /* NOR_A7 */
        {OFFSET(gpmc_a8), MODE(0)},            /* NOR_A8 */
        {OFFSET(gpmc_a9), MODE(0)},            /* NOR_A9 */
        {OFFSET(gpmc_a10), MODE(0)},            /* NOR_A10 */
        {OFFSET(gpmc_a11), MODE(0)},            /* NOR_A11 */
        {OFFSET(lcd_data8), MODE(1) | PULLUDEN},    /* NOR_A12 */
        {OFFSET(lcd_data9), MODE(1) | PULLUDEN},    /* NOR_A13 */
        {OFFSET(lcd_data10), MODE(1) | PULLUDEN},    /* NOR_A14 */
        {OFFSET(lcd_data11), MODE(1) | PULLUDEN},    /* NOR_A15 */
        {OFFSET(lcd_data12), MODE(1) | PULLUDEN},    /* NOR_A16 */
        {OFFSET(lcd_data13), MODE(1) | PULLUDEN},    /* NOR_A17 */
        {OFFSET(lcd_data14), MODE(1) | PULLUDEN},    /* NOR_A18 */
        {OFFSET(lcd_data15), MODE(1) | PULLUDEN},    /* NOR_A19 */
        {OFFSET(gpmc_a4), MODE(4)},            /* NOR_A20 */
        {OFFSET(gpmc_a5), MODE(4)},            /* NOR_A21 */
        {OFFSET(gpmc_a6), MODE(4)},            /* NOR_A22 */
        {OFFSET(gpmc_ad0), MODE(0) | RXACTIVE},        /* NOR_AD0 */
        {OFFSET(gpmc_ad1), MODE(0) | RXACTIVE},        /* NOR_AD1 */
        {OFFSET(gpmc_ad2), MODE(0) | RXACTIVE},        /* NOR_AD2 */
        {OFFSET(gpmc_ad3), MODE(0) | RXACTIVE},        /* NOR_AD3 */
        {OFFSET(gpmc_ad4), MODE(0) | RXACTIVE},        /* NOR_AD4 */
        {OFFSET(gpmc_ad5), MODE(0) | RXACTIVE},        /* NOR_AD5 */
        {OFFSET(gpmc_ad6), MODE(0) | RXACTIVE},        /* NOR_AD6 */
        {OFFSET(gpmc_ad7), MODE(0) | RXACTIVE},        /* NOR_AD7 */
        {OFFSET(gpmc_ad8), MODE(0) | RXACTIVE},        /* NOR_AD8 */
        {OFFSET(gpmc_ad9), MODE(0) | RXACTIVE},        /* NOR_AD9 */
        {OFFSET(gpmc_ad10), MODE(0) | RXACTIVE},    /* NOR_AD10 */
        {OFFSET(gpmc_ad11), MODE(0) | RXACTIVE},    /* NOR_AD11 */
        {OFFSET(gpmc_ad12), MODE(0) | RXACTIVE},    /* NOR_AD12 */
        {OFFSET(gpmc_ad13), MODE(0) | RXACTIVE},    /* NOR_AD13 */
        {OFFSET(gpmc_ad14), MODE(0) | RXACTIVE},    /* NOR_AD14 */
        {OFFSET(gpmc_ad15), MODE(0) | RXACTIVE},    /* NOR_AD15 */
        {OFFSET(gpmc_csn0), (MODE(0) | PULLUP_EN)},    /* NOR_CE */
        {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUP_EN)},    /* NOR_OE */
        {OFFSET(gpmc_wen), (MODE(0) | PULLUP_EN)},    /* NOR_WEN */
        {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NOR WAIT */
        {OFFSET(lcd_ac_bias_en), MODE(7) | RXACTIVE | PULLUDEN}, /* NOR RESET */
        {-1},
    };
    #endif

    For now, I stll can't operate the nor flash M29W128GL which is a 16MB (x16 width) flash memory.

    Does anyone show me a clue?

    Thanks!

  • Hi,mylesche

    What is the value when you reading from memory brower of the CCS,such as address 0x08000000 ,can you get the flash ID?

    And,you can compare your target with the ICE board and the SYSBIOS SDK,especially the pinmux when booting.

    YanTCK

  • Hi YanTCK,

    Thanks for your feedback!

    I don't use CCS, I use the Jtag Tool by our own.

    It failed to read flash ID.

    The board is EVM and I found that many pads on Nor Chip are muxed with GPMC nand LCD via CPLD.

    In my driver for AM3358EVM , I configured the pad mux and send the nor command, that's all! So, Do I need to operate the GPMC or something else in my driver?

    On other targets, some of PPC or ARM boards, I only need to initialize the ram space and let my driver run in this space, then it worked well.

    After power on, the data I read is 0xFF, then I program and read it, the data became 0xf0. If I reset the target, the data is 0xFF again.

  • mylesche,

    Is your timing correct,is there any other CS in the GPMC which may hamper the data line?

    Regards,

    YanTCK

  • YanTCK,

    There is no clock signal on this nor flash and we can find that there is no clock configuration related to the Nor flash pin mux in Uboot, so how to cnofigure the timing you mentioned? Do you mean configure the timing of GPMC? If so, how to set and where is the reference doc?

      I checked the schematic of 335X EVM, the pin mux is set correctly in Uboot, so there the data line is fine!

  • The driver can read the CFY info from the flash now, but after the erasure, the read data will be ff,00,ff,00,ff,00....,the gmpcad0--gpmcad15 are set correctly, but the high 8 bits looks wrong.

  • It works, I can operate the nor flash correctly now.

    The nor flash on EVM is in 8bit mode, that's why there were no data on DQ8-DQ14.

  • Hi myleshce,

         Could you share  your nor flash driver? Thanks.

  • Hi Gary,

    Due to IP issue, I can share the part about configuration and algo.

    I will pick up them from my project and post them here.

  • Hi mylesche,

        Thanks in advance.

  • Hello, mylesche.

    Can you help me a little about this?
    On TRM(spruh73f: P4264), there is below description.
    "Please note that all the pins might not be driven at boot time."

     - Which mux mode(XIP_MUX1 or XIP_MUX2) did you use on your NOR booting?

     - Have you checked all pins drive completely?
       or, Are any additional H/W tech needed, except A12-A27 drive low during boot?

    best regards
    RY

     

  • I have more of a SW question (for now) regarding booting the AM335X CPU from NOR on a proprietary board.

    Are any of you folks using U-Boot? If so, what are your config params?

    Do you program both the u-boot-spl.bin and u-boot.bin into NOR or just u-boot.bin?

    Any help would be greatly appreciated.