DSP/BIOS

Pengfei Zhan,

It sounds like you are using DSPLink on OMAP3530. What version of DSPLink are you using? Did you download DSPLink directly or are you using an SDK (if so, which one?). Note that our most recent release is DSPLink 1.65.01.06, which is available at the following link.

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/

You say the DDR2 and DSPLINKMEM addresses are not correct. These are memory map properties. These properties affect how the DSP executable is built, not the DSPLink driver. The following links describe these properties in more detail.

http://processors.wiki.ti.com/index.php/Changing_DSPLink_Memory_Map
http://processors.wiki.ti.com/index.php/Determining_DSPLink_shared_memory_size_requirements

Here is some additional information about DSPLink which might be helpful.

http://processors.wiki.ti.com/index.php/DSPLink_Overview
http://processors.wiki.ti.com/index.php/Building_DSPLink

How did you determine the memory map is incorrect? Did you inspect the map file for the DSP executable? Maybe you can attach the map file to this thread. Also would be good to know your Linux version and memory map.

~Ramsey

Ramsey,

   Thank  you very much for your replay!!!!!

First ,my release is dsplink 1.61.03. I want to change the memory map of  dsplink .Herre is my memory map:

STATIC LINKCFG_MemEntry  LINKCFG_memTable_00 [] =
{
    {
        0,                     /* ENTRY          : Entry number */
        "DSPLINKMEM",          /* NAME           : Name of the memory region */
        0x87000000,            /* ADDRPHYS       : Physical address */
        0x87000000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x5000,                /* SIZE           : Size of the memory region */
        TRUE                   /* SHARED         : Shared access memory? */
    },
    {
        1,                     /* ENTRY          : Entry number */
        "DSPLINKMEM1",         /* NAME           : Name of the memory region */
        0x87005000,            /* ADDRPHYS       : Physical address */
        0x87005000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00FB000,               /* SIZE           : Size of the memory region */
        TRUE                   /* SHARED         : Shared access memory? */
    },
    {
        2,                     /* ENTRY          : Entry number */
        "RESETCTRL",           /* NAME           : Name of the memory region */
        0x87100000,            /* ADDRPHYS       : Physical address */
        0x87100000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00001000,            /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        3,                     /* ENTRY          : Entry number */
        "DDR",                 /* NAME           : Name of the memory region */
        0x87101000,            /* ADDRPHYS       : Physical address */
        0x87101000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x07E00000,             /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        4,                       /* ENTRY          : Entry number */
        "POOLMEM",                         /* NAME           : Name of the memory region */
        0x8EF10000,                    /* ADDRPHYS       : Physical address */
        0x8EF10000,                    /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1u,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x01000000,                    /* SIZE           : Size of the memory region */
        TRUE,                              /* SHARED         : Shared access memory? Logically */
        FALSE,                             /* SYNCD          : Synchornized? */
    },
    {
        5,                     /* ENTRY          : Entry number */
        "DSPIRAM",             /* NAME           : Name of the memory region */
        0x5c7f8000,            /* ADDRPHYS       : Physical address */
        0x107f8000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00018000,            /* SIZE           : Size of the memory region */
        TRUE,                  /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
    {
        6,                     /* ENTRY          : Entry number */
        "DSPL1PRAM",           /* NAME           : Name of the memory region */
        0x5cE00000,            /* ADDRPHYS       : Physical address */
        0x10E00000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00008000,            /* SIZE           : Size of the memory region */
        TRUE,                  /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
    {
        7,                     /* ENTRY          : Entry number */
        "DSPL1DRAM",           /* NAME           : Name of the memory region */
        0x5cF04000,            /* ADDRPHYS       : Physical address */
        0x10F04000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00014000,            /* SIZE           : Size of the memory region */
        TRUE,                  /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
    {
        8,                     /* ENTRY          : Entry number */
        "L4_CORE",             /* NAME           : Name of the memory region */
        0x48000000,            /* ADDRPHYS       : Physical address */
        0x48000000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00100000,            /* SIZE           : Size of the memory region */
        FALSE,                 /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
    {
        9,                     /* ENTRY          : Entry number */
        "L4_PER",              /* NAME           : Name of the memory region */
        0x49000000,            /* ADDRPHYS       : Physical address */
        0x49000000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00100000,            /* SIZE           : Size of the memory region */
        FALSE,                 /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    }
} ;

I also have changed the server.tcf of  DSP SERVER ,but when i execution the decode the application .I found some error,so i use CE_DEBUG=3 found some message :

@0,856,445us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #0 to Link configuration: name='DDR2', startAddress=0x87200000, sizeInBytes=0xe00000, shared=1, syncd=0
@0,856,506us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #1 to Link configuration: name='DSPLINKMEM', startAddress=0x87001000, sizeInBytes=0xff000, shared=1, syncd=0
@0,856,536us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #2 to Link configuration: name='RESET_VECTOR', startAddress=0x87000000, sizeInBytes=0x1000, shared=1, syncd=0
@0,856,567us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #3 to Link configuration: name='L4PER', startAddress=0x49000000, sizeInBytes=0x100000, shared=0, syncd=0
@0,915,649us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #4 to Link configuration: name='IRAM', startAddress=0x5c7f8000, sizeInBytes=0x8000, shared=1, syncd=0
@0,915,710us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #5 to Link configuration: name='L1DSRAM', startAddress=0x5cf04000, sizeInBytes=0x10000, shared=1, syncd=0
@0,915,740us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #6 to Link configuration: name='DDRALGHEAP', startAddress=0x87100000, sizeInBytes=0x100000, shared=0, syncd=0
@0,915,801us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #7 to Link configuration: name='L4CORE', startAddress=0x48000000, sizeInBytes=0x1000000, shared=0, syncd=0
@0,915,832us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Found 'CMEM' entry, adjusting base and size according to CMEM_getBlock()
@0,915,893us: [+0 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Setting CMEM base to 0x86300000, size to 0x1000000
@0,915,924us: [+2 T:0x40cb1490 S:0x40cb0d74] OP - Processor_create_d> Adding DSP segment #8 to Link configuration: name='CMEM', startAddress=0x86300000, sizeInBytes=0x1000000, shared=0, syncd=0

SO I determined the memory map is incorrect . 

I feel very confused and I didn't know how to do ? please tell me hwo should  i do  . thank you very much!

Pengfei Zhan,

I'm not sure why the thread is marked answered. I'm assuming that you still have questions.

It looks like you are using Codec Engine, is this correct? If so, then you need to modify the memory map in the tci file used to build the Codec Engine server. These files are in the Codec Engine examples, not in DSPLink. Look for the following file.

codec_engine_install_dir/examples/ti/sdo/ce/examples/servers/all_codecs/all_evm3530.tci

In this file, you will find memory map entries for DDRALGHEAP, DDR2, RESET_VECTOR. Do *not* add a CMEM entry, this is done automatically for you by Codec Engine.

You must rebuild your server first. This generates an internal file used by Codec Engine when you build the application side. Run your application with CE_DEBUG=3 and look for the memory map entries. You can verify that the configuration was updated correctly.

None of the memory map configuration is used by the DSPLink driver (dsplinkk.ko). Be sure to restore the files from DSPLink and rebuild the driver as you had it originally.

~Ramsey

Ramsey，

Thank you very much for your reply!!!  You have saved me  !!!!  I have changed the .tci file and the resule was correct. Before i don't know the reason and I have worked for two weeks ,and the result was not correct . Thank   you again!!!!!!!!!  Can you recommond some  information about the system. I want to learn this architecture systmatically.

Thank you !!!!! YOU ARE SO KIND !!!

Pengfei Zhan,

I'm glad you have it working now. To learn more about the OMAP3530 device, I would start at the product folder web page. This page has many good links. The OMAP3530 Data Sheet and TRM are good technical documents on the device itself.

OMAP3530 Product Folder
OMAP3530 Data Sheet
OMAP3530 TRM

~Ramsey

Ramsey，

Thank you very much!! It's very kind of you!!!!! Could you give me your email? I think I will have many problems in the later.

 Thank you again!!

Pengfei,

I'm glad Ramsey was able to help resolve your issue.  But I would prefer that you continue to use the forums for your future issues rather than trying to revert to a 1-on-1 email exchange with individuals within TI.  Reasons include:

1. For many of the forums, we rotate engineers in and out of forum duty from week to week so that they can switch between customer support and product development.  Also, individual's may be off-line because of travel and absences or other circumstances.  Posting on the forum will ensure a more timely response.
2. There is never just one person to answer all questions.  By having questions posted on the forum rather than to an individual, we can more easily allow the most appropriate person to respond.  Or have multiple people respond.  And even have other customers respond.
3. Your question and its answer may be of interest to other users.  By conducting the exchange in a public forum, we allow others to benefit -- not just now, but in the future as well (because the forum posts are indexed by search engines such as Google).

Best Regards,

Dave

Dave, 

I have known it. Thank you very much! I understand very well。It is my thoughtless...

Thank you for your all worl!! Thank you for providing such a good platform for us。。。

Dave,

Whenever I run the program in omap3530 always prompts me this error：

DSP MMU Error Fault! MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that
generated the interrupt = [0xff0004a0].
DSP MMU Error Fault! MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that gen
erated the interrupt = [0xff0004a0].

I've checked the documentation, looked at a specific documentation of this type of error. I said that:

If you know the memory range to map to the DSP MMU at build time of DSP server
In Codec Engine 2.20 and higher you can simply add a definition for the memory range in the DSP server's
DSP/BIOS (.tcf) configuration file. For example:
var mem_ext = [ ... { comment: "Mapping this memory region to DSP MMU", name:
"MYMEM", base: 0x85800000, // Base physical address of memory region len:
0x00400000, // Length of memory region to be mapped space: "data" }, ];

I am not particularly understand！！

BUT  I did so.I add these words to my DSP/BIOS (.tcf) configuration file as follows:

BASE_ADDR_BOTTOM = 0x8F200000

/*
* Specify the sizes of the memory segments as per the requirements
*/
var DSPLINKMEM_SIZE = 0x00100000 /* 1M space includes the Reset Vector, DSP Link */
var DSPEXTMEM_SIZE = 0x03400000 /* 3M space for the external code and data */
var DDRALGHEAP_SIZE = 0x04A00000 /* 9M space for the DDRALGHEAP */

/*
* Please do not modify anything below from this line onwards
* Note that RESET_VECTOR_SIZE is taken in the 1MB space of the DSPLINK memory
*/
var RESET_VECTOR_SIZE = 0x00001000
RESET_VECTOR_BASE_ADDR = (BASE_ADDR_BOTTOM - DSPLINKMEM_SIZE - DSPEXTMEM_SIZE - DDRALGHEAP_SIZE) & 0xFFF00000;

var platform = environment["config.platform"];
print("platform = " + platform);

if ( (BASE_ADDR_BOTTOM - DSPLINKMEM_SIZE - DSPEXTMEM_SIZE - DDRALGHEAP_SIZE) & 0x000FFFFF )
{
print("Warning:Check the sizes of the memory segments; 1Mbyte aligned sizes would give the optimal server size!");
}

/*
* Setup platform-specific memory map:
*/

var mem_ext = [
{
comment: "RESET_VECTOR: off-chip memory for the reset vector table",
name: "RESET_VECTOR",
base: RESET_VECTOR_BASE_ADDR,
len: RESET_VECTOR_SIZE,
space: "code/data"
},
{
comment: "DSPLINK: off-chip memory reserved for DSPLINK code and data",
name: "DSPLINKMEM",
base: (RESET_VECTOR_BASE_ADDR + RESET_VECTOR_SIZE),
len: (DSPLINKMEM_SIZE-RESET_VECTOR_SIZE),
space: "code/data"
},
{
comment: "DDRALGHEAP: off-chip memory for dynamic algmem allocation",
name: "DDRALGHEAP",
base: (RESET_VECTOR_BASE_ADDR + DSPLINKMEM_SIZE),
len: DDRALGHEAP_SIZE,
space: "code/data"
},
{
comment: "DDR2: off-chip memory for application code and data",
name: "DDR2",
base: (RESET_VECTOR_BASE_ADDR + DSPLINKMEM_SIZE + DDRALGHEAP_SIZE),
len: DSPEXTMEM_SIZE,
space: "code/data"
},
{
comment: "L4CORE: L4-Core Interconnect Address Space",
name: "L4CORE",
base: 0x48000000,
len: 0x01000000,
space: "data"
},
{
comment: "L4PER: L4-Peripheral Interconnect Address Space",
name: "L4PER",
base: 0x49000000,
len: 0x00100000,
space: "data"
},
{ comment: "Mapping this memory region to DSP MMU",
name: "MYMEM",
base: 0x8F200000, // Base physical address of memory region
len: 0x00400000, // Length of memory region to be mapped
space: "data"
},
];

I rebulid my dspserver and application. BUT i error still exist。

PLEASE tell me how should i do .  Thank you very much!!!!!!!!!

From the error message reported, it appears that some thread within your application is trying to access something at address 0xff0004a0.

As this address is not within any memory segment defined for your application, the MMU is detecting a fault when this address is accessed.

I checked the OMAP3530 data sheet and did not find any memory or peripheral defined at the 0xff0004a0 address so I'm thinking that either the code is unintentionally accessing that address, or that this address corresponds to something unique to your application.

If this is a valid address, then I think you need to add a definition for this memory region so that the MMU will get programmed to allow accesses to it.

Something like this might do the trick:

{ comment: "Mapping this memory region to DSP MMU",
name: "MYDevice",
base: 0xff0004a0,  // Base physical address of memory region
len: 0x00001000,   // Length of memory region to be mapped
space: "data"
},

If this NOT a valid address, you'll have to track down where the bogus address is coming from in your application.

Alan

Pengfei Zhan,

That address looks like an error code to me. Probably some function is supposed to return an address but returns an error instead which leads to an MMU fault as Alan describes above. Try running your host executable with CE_DEBUG=2 to see if you get any indication of a failure. You can also connect to the DSP with CCS and inspect the error log for any messages.

~Ramsey

Pengfei Zhan,

I see that you marked the post above as answered. Did you fix this on your own?

If not, are you adding new C code in an existing file or a new file? Are you adding assembly code in a new file? What command is the makefile issuing to build your code? This information would be needed to help us understand the problem.

Thanks
~Ramsey

Ramsey,

Thank you for your reply!!!!!  I don't work it out...  So I still have to ask your advice.  I want to bulid a new codec and I modified my codec in accordance with the model of vidde2_copy...There are some c files and assembly files in my codec . The C code will call the assembly code and they are saved separately..

i have check some information about it . It said that if you want to compiled  the DSP assembler assembler or linear in the Linux environment  , you have to add this worlds

C64P.extensions[“.sa”] = {
suf: “.sa”, typ: “asm:-fl”
}

after 

var C64P = xdc.useModule(‘ti.targets.C64P’);  in the config.bld file and the file is in the  path $(CE_INSTALL_DIR)/examples....BUT when i open the config.bld file, I found it Written in accordance with the following format：

var C64P_rootdir;
//var C674_rootdir;
var V5T_rootdir;
var CC_V5T;
var ucarm9_rootdir;
var linux86_rootdir;
var wince_rootdir;
var wince_projectroot;
var devices;
var programs;
var gppos;

/* initialize local vars with those set in xdcpaths.mak (via XDCARGS) */
for (x = 0; x < arguments.length; x++) {
if (arguments[x].match(/^CGTOOLS_C64P=/)) {
C64P_rootdir = arguments[x].split("=")[1];
} else if(arguments[x].match(/^CGTOOLS_C674=/)) {
C674_rootdir = arguments[x].split("=")[1];
} else if(arguments[x].match(/^CGTOOLS_V5T=/)) {
V5T_rootdir = arguments[x].split("=")[1];
} else if(arguments[x].match(/^CC_V5T=/)) {
CC_V5T = arguments[x].split("=")[1];
/* } else if(arguments[x].match(/^CGTOOLS_UCARM9=/)) {
ucarm9_rootdir = arguments[x].split("=")[1];

} else if(arguments[x].match(/^CGTOOLS_LINUX86=/)) {
linux86_rootdir = arguments[x].split("=")[1];
*/
/*
} else if(arguments[x].match(/^WINCE_ROOTDIR=/)) {
wince_rootdir = arguments[x].split("=")[1];

} else if(arguments[x].match(/^WINCE_PROJECTROOT=/)) {
wince_projectroot = arguments[x].split("=")[1];
*/
} else if(arguments[x].match(/^DEVICES=/)) {
devices = arguments[x].split("=")[1];
} else if(arguments[x].match(/^PROGRAMS=/)) {
programs = arguments[x].split("=")[1];
} else if(arguments[x].match(/^GPPOS=/)) {
gppos = arguments[x].split("=")[1];
}
}

var os = environment["xdc.hostOS"];

/*
* ======== DSP target ========
*/
var remarks = " " +
// "-pdr " + // enable remarks
"-pden " + // enumerate remarks
// "-pds=880 " + // variable never referenced
// "-pds=552 " + // variable set but not used
// "-pds=238 " + // controlling expression is constant
// "-pds=681 " + // call cannot be inlined
// "-pds=452 " + // long long type is not standard
"-pds=195 " + // zero used for undefined preprocessing id (setjmp.h)
"";

/* supported targets we _might_ build for */
var GCArmv5T;
var C64P;
//var C674;
//var UCArm9;
//var WinCE;
//var Linux86;

/* Loading this 'capsule' initializes the targets we _will_ build for */
utils.loadCapsule('ti/sdo/ce/examples/buildutils/Platforms.xs');

/* now that we know which targets we're building for, finish their config */
if (C64P != undefined) {
C64P.rootDir = C64P_rootdir;
C64P.ccOpts.prefix += remarks;

Build.targets.$add(C64P);
}
/*
if (C674 != undefined) {
C674.rootDir = C674_rootdir;
C674.ccOpts.prefix += remarks;

Build.targets.$add(C674);
}

if (Linux86 != undefined) {
Linux86.rootDir = linux86_rootdir;
Linux86.lnkOpts.suffix = "-lpthread " + Linux86.lnkOpts.suffix;

Build.targets.$add(Linux86);
}
*/
/*
if (UCArm9 != undefined) {
UCArm9.rootDir = ucarm9_rootdir;
UCArm9.ccOpts.prefix += " -D_REENTRANT ";

UCArm9.lnkOpts.suffix = "-lpthread " + UCArm9.lnkOpts.suffix;

Build.targets.$add(UCArm9);
}
*/
if (GCArmv5T != undefined) {
GCArmv5T.rootDir = V5T_rootdir;
GCArmv5T.LONGNAME = CC_V5T;
GCArmv5T.ccOpts.prefix += " -Wall -fno-strict-aliasing ";
GCArmv5T.lnkOpts.suffix = GCArmv5T.lnkOpts.suffix.replace("-lstdc++", "");

/* add pthreads */
GCArmv5T.lnkOpts.suffix += " -lpthread ";

Build.targets.$add(GCArmv5T);
}
/*
if (WinCE != undefined) {
WinCE.rootDir = wince_rootdir;
WinCE.execExt = "_wince.exe";
WinCE.projectRoot = wince_projectroot;

Build.targets.$add(WinCE);
}
*/

/*
* ======== Pkg.attrs.profile ========
*/
Pkg.attrs.profile = "release";

SO i do not find the worlds var C64P = xdc.useModule(‘ti.targets.C64P’);   I've added these words

 C64P.extensions[“.sa”] = {
suf: “.sa”, typ: “asm:-fl”
}

after 

/* now that we know which targets we're building for, finish their config */
if (C64P != undefined) {
C64P.rootDir = C64P_rootdir;
C64P.ccOpts.prefix += remarks;

SO my config.bld file have become this:

/* now that we know which targets we're building for, finish their config */
if (C64P != undefined) {
C64P.rootDir = C64P_rootdir;
C64P.ccOpts.prefix += remarks;

C64P.extensions[“.sa”] = {

suf: “.sa”, typ: “asm:-fl”
}

BUT after this the problem is still exist . It seems like these modifications don't work..

SO PLEASE TELL ME HOW SHUOLD I DO!!! Thank you very much!!!

By the way my DVSDK version is dvsdk_3_00_02_44 and my platform is omap3530....

AND the makefile file is in the viddec2_copy . I don't change it ...

Pengfei Zhan,

It looks to me like you are using "scheduled" assembly, not "linear" assembly. Also, your file extension looks like ".asm". Try adding the following to your config.bld script.

C64P.extensions[".asm"] = {
    suf: ".asm", typ: "asm"
}

By the way, it's okay to have multiple 'C64P.extension["key"]' assignments as long as the "key" is unique in each statement. So, you can keep the ones you have already added.

Here is a link with more information.

http://rtsc.eclipse.org/cdoc-tip/ti/targets/C64P.html#extensions

~Ramsey

Ramsey，

Thank you very much for your reply!!! I think the problem has solved partly..When i modified the config.bld file,i fond some news errors..I shield these worlds in the file .as follows:

if (GCArmv5T != undefined) {
GCArmv5T.rootDir = V5T_rootdir;
GCArmv5T.LONGNAME = CC_V5T;
GCArmv5T.ccOpts.prefix += " -Wall -fno-strict-aliasing ";
GCArmv5T.lnkOpts.suffix = GCArmv5T.lnkOpts.suffix.replace("-lstdc++", "");

GCArmv5T.lnkOpts.suffix += " -lpthread ";

Build.targets.$add(GCArmv5T);
}

I Executed the makefile and  the last error has gone. But new error is Produced..These errors are:

asm64P Lum0_all.asm ...
/home/ceslab/dvsdk_3_00_02_44/cg6x_6_0_16/bin/cl6x -c -qq -mv64p -eo.o64P -ea.s64P -Dxdc_target_name__=C64P -Dxdc_target_types__=ti/targets/std.h -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_6_0_16 -I. -I/home/ceslab/dvsdk_3_00_02_44/codec_engine_2_24/examples/ti/sdo/ce/examples/codecs/avsdec/../../../../../.. -I/home/ceslab/dvsdk_3_00_02_44/codec_engine_2_24/packages -I/home/ceslab/dvsdk_3_00_02_44/xdais_6_24/packages -I/home/ceslab/dvsdk_3_00_02_44/linuxutils_2_24_02/packages -I/home/ceslab/dvsdk_3_00_02_44/framework_components_2_24/packages -I/home/ceslab/dvsdk_3_00_02_44/biosutils_1_01_00/packages -I/home/ceslab/dvsdk_3_00_02_44/bios_5_33_06/packages -I/home/ceslab/dvsdk_3_00_02_44/dsplink_1_61_03/packages -I/home/ceslab/dvsdk_3_00_02_44/xdctools_3_15_01_59/packages -I../../../../../.. -I/home/ceslab/dvsdk_3_00_02_44/cg6x_6_0_16/include -fr=./package/lib/lib/avsdec -fa Lum0_all.asm
"Lum0_all.asm", WARNING! at line 76: [W0000] Too many operands, ignoring extras
||MV .S2X b_stride,a_p,b_p

"Lum0_all.asm", REMARK at line 76: [R0001] After symbol substitution the line
became:
||MV .S2X B5,A7,B7

"Lum0_all.asm", ERROR! at line 76: [E0800] Excessive use of cross path on side
A; already used for register B6 in
this packet, cannot be reused for
register B5
||MV .S2X b_stride,a_p,b_p

"Lum0_all.asm", REMARK at line 76: [R0001] After symbol substitution the line
became:
||MV .S2X B5,A7,B7

"Lum0_all.asm", ERROR! at line 76: [E0800] Functional unit side requested does
not match side needed
||MV .S2X b_stride,a_p,b_p

"Lum0_all.asm", REMARK at line 76: [R0001] After symbol substitution the line
became:
||MV .S2X B5,A7,B7

"Lum0_all.asm", ERROR! at line 84: [E0004] Operand #2, a_d1, not legal:
register expected
LDB .D2T2 * a_p ,a_d1

"Lum0_all.asm", REMARK at line 84: [R0001] After symbol substitution the line
became:
LDB .D2T2 * A7 ,a_d1

"Lum0_all.asm", REMARK at line 90: [R5000] L1D bug may be triggered by this
execute packet
[!B2]CMPEQ .L1 A5,1,A0
||[!B2]CMPEQ .L2 B6,0,B1
||[A1]LDB .D1T1 * +A9(-1),A3
||LDB .D2T2 * B7 ,B5
||ADD .S2 B7, B5,B7

"Lum0_all.asm", ERROR! at line 104: [E0004] Operand #2, a_d3, not legal:
register expected
||LDB .D2T2 * a_p ,a_d3

"Lum0_all.asm", REMARK at line 104: [R0001] After symbol substitution the line
became:
||LDB .D2T2 * A7 ,a_d3

"Lum0_all.asm", ERROR! at line 107: [E0801] Cannot mix aligned and non-aligned
loads/stores
STNDW .D1T1 A17:A16,* +A6(1)
||LDB .D2T2 * B7 ,B5
||ADD .S2 B7, B5,B7

"Lum0_all.asm", ERROR! at line 111: [E0801] Cannot mix aligned and non-aligned
loads/stores
[A0] RET .S2 B3
||[A1]STNDW .D1T1 A19:A18,* +A6(9)
||LDB .D2T2 * B7 ,B5
||ADD .S2 B7, B5,B7

"Lum0_all.asm", ERROR! at line 116: [E0801] Cannot mix aligned and non-aligned
loads/stores
[B0]STNDW .D1T1 A19:A18,* +A6(9)
||PACK2 .L2 B5,B5,B5
||LDB .D2T2 * B7 ,B5
||ADD .S2 B7, B5,B7

"Lum0_all.asm", WARNING! at line 121: [W0000] Word offsets must be divisible by
4, truncated
[L_DC]STNW .D1T1 a_d1211109,* +top(9)

"Lum0_all.asm", REMARK at line 121: [R0001] After symbol substitution the line
became:
[A2]STNW .D1T1 A18,* +A6(9)

"Lum0_all.asm", ERROR! at line 121: [E0801] Cannot mix aligned and non-aligned
loads/stores
[A2]STNW .D1T1 A18,* +A6(9)
||LDB .D2T2 * B7 ,B5
||ADD .S2 B7, B5,B7

"Lum0_all.asm", ERROR! at line 143: [E0009] Base address register expected
LDB .D1T1 * P ,a_d11

"Lum0_all.asm", ERROR! at line 143: [E0004] Operand #1 not legal: indirect
expected
LDB .D1T1 * P ,a_d11

"Lum0_all.asm", REMARK at line 143: [R0001] After symbol substitution the line
became:
LDB .D1T1 * P ,B5

"Lum0_all.asm", ERROR! at line 149: [E0009] Base address register expected
||LDB .D1T1 * P ,a_d13

"Lum0_all.asm", ERROR! at line 149: [E0004] Operand #1 not legal: indirect
expected
||LDB .D1T1 * P ,a_d13

"Lum0_all.asm", REMARK at line 149: [R0001] After symbol substitution the line
became:
||LDB .D1T1 * P ,B5

"Lum0_all.asm", ERROR! at line 155: [E0009] Base address register expected
||LDB .D1T1 * P ,a_d15

"Lum0_all.asm", ERROR! at line 155: [E0004] Operand #1 not legal: indirect
expected
||LDB .D1T1 * P ,a_d15

"Lum0_all.asm", REMARK at line 155: [R0001] After symbol substitution the line
became:
||LDB .D1T1 * P ,B5

"Lum0_all.asm", ERROR! at line 246: [E0300] Symbol _Luma0_all has already been
defined
LDB .D1T1 * +a_p1(-1) ,a_d0

"Lum0_all.asm", ERROR! at line 283: [E0004] Operand #2, A16, not legal:
indirect expected
STNDW .D1T1 * +top(1) ,a_d8765l:a_d4321

"Lum0_all.asm", REMARK at line 283: [R0001] After symbol substitution the line
became:
STNDW .D1T1 * +A6(1) ,A17:A16

"Lum0_all.asm", ERROR! at line 283: [E0004] Operand #1, A6, not legal: regpair
expected
STNDW .D1T1 * +top(1) ,a_d8765l:a_d4321

"Lum0_all.asm", REMARK at line 283: [R0001] After symbol substitution the line
became:
STNDW .D1T1 * +A6(1) ,A17:A16

"Lum0_all.asm", ERROR! at line 307: [W0005] Branch to register requires .S2
unit
[DC]RET .S1 B3

"Lum0_all.asm", REMARK at line 307: [R0001] After symbol substitution the line
became:
[B0]RET .S1 B3

"Lum0_all.asm", WARNING! at line 322: [W0000] Word offsets must be divisible by
4, truncated
STNW .D2T2 b_d4321, * +left(1)

"Lum0_all.asm", REMARK at line 322: [R0001] After symbol substitution the line
became:
STNW .D2T2 B20, * +B4(1)

"Lum0_all.asm", WARNING! at line 326: [W0000] Word offsets must be divisible by
4, truncated
STNW .D2T1 a_d8765, * +left(5)

"Lum0_all.asm", REMARK at line 326: [R0001] After symbol substitution the line
became:
STNW .D2T1 A18, * +B4(5)

"Lum0_all.asm", ERROR! at line 328: [W0005] Branch to register requires .S2
unit
||RET .S1 B3

"Lum0_all.asm", ERROR! at line 331: [E0002] Illegal mnemonic specified
||||STB .D2T1 a_d0,* left

"Lum0_all.asm", ERROR! at line 335: [E0004] Operand #2, B16, not legal:
indirect expected
||STNDW .D1T2 * +top(9) ,b_d16151413l:b_d1211109l

"Lum0_all.asm", REMARK at line 335: [R0001] After symbol substitution the line
became:
||STNDW .D1T2 * +A6(9) ,B17:B16

"Lum0_all.asm", ERROR! at line 335: [E0004] Operand #1, A6, not legal: regpair
expected
||STNDW .D1T2 * +top(9) ,b_d16151413l:b_d1211109l

"Lum0_all.asm", REMARK at line 335: [R0001] After symbol substitution the line
became:
||STNDW .D1T2 * +A6(9) ,B17:B16

"Lum0_all.asm", WARNING! at line 340: [W0000] Word offsets must be divisible by
4, truncated
STNW .D2T2 b_d1211109,* +left(9)

"Lum0_all.asm", REMARK at line 340: [R0001] After symbol substitution the line
became:
STNW .D2T2 B7,* +B4(9)

"Lum0_all.asm", WARNING! at line 342: [W0000] Word offsets must be divisible by
4, truncated
STNW .D2T1 a_d16151413,* +left(13)

"Lum0_all.asm", REMARK at line 342: [R0001] After symbol substitution the line
became:
STNW .D2T1 A7,* +B4(13)

"Lum0_all.asm", ERROR! at EOF: [E0300] The following symbols are undefined:
P
a_d1
a_d3

Errors in Source - Assembler Aborted
23 Assembly Errors, 6 Assembly Warnings

NOW I want to ask two questions ..First,I want to know What effects it will produce after i shield the worlds??Second what kinds of the new errors??? DO the .asm file   need  specific wording? THE .asm file has been compiled under the CCS enviroment.

ANOTHER question is about the DSP MMU FAULT. I obey your suggestions and use the CE_DEBUG=2 ..I found the palace that the error occurs is random...SO i am very Confused。。THE message are :

FIRST

Received packet,size:20555

@28,100,555us: [+0 T:0x41cb1490] ti.sdo.ce.video2.VIDDEC2 - VIDDEC2_process> Enter (handle=0x62378, inBufs=0x41cb04ac, outBufs=0x41cb04a0, inArgs=0x41cb0d10, outArgs=0x41cb0570)

@28,100,616us: [+5 T:0x41cb1490] CV - VISA_allocMsg> Allocating message for messageId=0x0002de09

@28,100,769us: [+0 T:0x41cb1490] CV - VISA_call(visa=0x62378, msg=0x42f4e880): messageId=0x0002de09, command=0x0

n=5

[DSP] @42,869,539tk: [+5 T:0x8bf07f4c] CN - NODE> 0x8be04ea0(avsdec#0) call(algHandle=0x8be04f60, msg=0x87305880); messageId=0x0002de09

[DSP] @42,869,619tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> Enter(addr=0x867a1000, sizeInBytes=20555)

[DSP] @42,869,693tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> return

[DSP] @42,869,727tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> Enter(addr=0x86aa1000, sizeInBytes=811008)

[DSP] @42,870,652tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> return

[DSP] @42,870,688tk: [+0 T:0x8bf07f4c] ti.sdo.ce.video2.VIDDEC2 - VIDDEC2_process> Enter (handle=0x8be04f60, inBufs=0x8bf0a684, outBufs=0x8bf0a748, inArgs=0x873059f8, outArgs=0x87305a04)

[DSP] @42,870,787tk: [+5 T:0x8bf07f4c] CV - VISA_enter(visa=0x8be04f60): algHandle = 0x8be04f90

[DSP] @42,870,840tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_activate> Enter(alg=0x8be04f90)

[DSP] @42,870,895tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_activate> Exit

[DSP] @42,870,939tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_TI_process(0x87400718, 0x8bf0a748, 0x87305a04, 0x873059f8, 0x8bf0a684)

[DSP] @42,871,019tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - pGAVS_t(0x5)

[DSP] @42,871,061tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_numInBytes(20555)

[DSP] @43,099,959tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - t->height*t->width is (576*704)

[DSP] @43,100,045tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - inArgs->inputID(6)

[DSP] @43,100,097tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_numInBytes(20555)

[DSP] @43,100,155tk: [+5 T:0x8bf07f4c] CV - VISA_exit(visa=0x8be04f60): algHandle = 0x8be04f90

[DSP] @43,100,216tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_deactivate> Enter(alg=0x8be04f90)

[DSP] @43,100,278tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_deactivate> Exit

[DSP] @43,100,328tk: [+0 T:0x8bf07f4c] ti.sdo.ce.video2.VIDDEC2 - VIDDEC2_process> Exit (handle=0x8be04f60, retVal=0x0)

[DSP] @43,100,392tk: [+0 T:0x8bf07f4c] OM - Memory_cacheWb> Enter(addr=0x86aa1000, sizeInBytes=811008)

[DSP] @43,101,542tk: [+0 T:0x8bf07f4c] OM - Memory_cacheWb> return

[DSP] @43,101,576tk: [+0 T:0x8bf07f4c] OM - Memory_cacheWb> Enter(addr=0x86aa1000, sizeInBytes=811008)

[DSP] @43,102,531tk: [+0 T:0x8bf07f4c] OM - Memory_cacheWb> return

[DSP] @43,102,567tk: [+5 T:0x8bf07f4c] CN - NODE> returned from call(algHandle=0x8be04f60, msg=0x87305880); messageId=0x0002de09

Received packet,size:20607

n=6

@28,488,464us: [+0 T:0x404b1210] CE - Engine_getCpuLoad(0x62c90)

@28,589,508us: [+0 T:0x41cb1490] CE - Engine_fwriteTrace> returning count [2480]

@28,589,569us: [+0 T:0x41cb1490] CV - VISA_call Completed: messageId=0x0002de09, command=0x0, return(status=0)

@28,589,752us: [+5 T:0x41cb1490] CV - VISA_freeMsg(0x62378, 0x42f4e880): Freeing message with messageId=0x0002de09

@28,589,813us: [+0 T:0x41cb1490] ti.sdo.ce.video2.VIDDEC2 <1>DSP MMU Error Fault!  MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that generated the interrupt = [0x144a6200].

DSP MMU Error Fault!  MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that generated the interrupt = [0x144a6200].

 SECOND

Received packet,size:18542

n=10

[DSP] @46,042,325tk: [+5 T:0x8bf07f4c] CN - NODE> 0x8be04ea0(avsdec#0) call(algHandle=0x8be04f60, msg=0x87305880); messageId=0x0002de0c

[DSP] @46,042,409tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> Enter(addr=0x867a1000, sizeInBytes=811008)

[DSP] @46,043,337tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> return

[DSP] @46,043,372tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> Enter(addr=0x86697000, sizeInBytes=811008)

[DSP] @46,044,299tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> return

[DSP] @46,044,335tk: [+0 T:0x8bf07f4c] ti.sdo.ce.video2.VIDDEC2 - VIDDEC2_process> Enter (handle=0x8be04f60, inBufs=0x8bf0a684, outBufs=0x8bf0a748, inArgs=0x873059f8, outArgs=0x87305a04)

[DSP] @46,044,436tk: [+5 T:0x8bf07f4c] CV - VISA_enter(visa=0x8be04f60): algHandle = 0x8be04f90

[DSP] @46,044,491tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_activate> Enter(alg=0x8be04f90)

[DSP] @46,044,547tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_activate> Exit

[DSP] @46,044,592tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_TI_process(0x87400718, 0x8bf0a748, 0x87305a04, 0x873059f8, 0x8bf0a684)

[DSP] @46,044,673tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - pGAVS_t(0x8)

[DSP] @46,044,715tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_numInBytes(811008)

[DSP] @46,295,072tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - t->height*t->width is (576*704)

[DSP] @46,295,161tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - inArgs->inputID(1)

[DSP] @46,295,214tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_numInBytes(811008)

[DSP] @46,295,275tk: [+5 T:0x8bf07f4c] CV - VISA_exit(visa=0x8be04f60): algHandle = 0x8be04f90

[DSP] @46,295,339tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_deactivate> Enter(alg=0x8be04f90)

[DSP] @46,295,401tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_deactivate> Exit

[DSP] @46,295,451tk: [+0 T:0x8bf07f4c] ti.sdo.ce.video2.VIDDEC2 - VIDDEC2_process> Exit (handle=0x8be04f60, retVal=0x0)

[DSP] @46,295,517tk: [+0 T:0x8bf07f4c] OM - Memory_cacheWb> Enter(addr=0x86697000, sizeInBytes=811008)

[DSP] @46,296,669tk: [+0 T:0x8bf07f4c] OM - Memory_cacheWb> return

[DSP] @46,296,722tk: [+0 T:0x8bf07f4c] OM - Memory_cacheWb> Enter(addr=0x86697000, sizeInBytes=811008)

[DSP] @46,297,675tk: [+0 T:0x8bf07f4c] OM - Memory_cacheWb> return

[DSP] @46,297,712tk: [+5 T:0x8bf07f4c] CN - NODE> returned from call(algHandle=0x8be04f60, msg=0x87305880); messageId=0x0002de0c

@30,253,173us: [+0 T:0x41cb1490] CE - Engine_fwriteTrace> returning count [2483]

@30,594,665us: [+0 T:0x41cb1490] CV - VISA_call Completed: messageId=0x0002de0c, command=0x0, return(status=0)

@30,594,909us: [+5 T:0x41cb1490] CV - VISA_freeMsg(0x62378, 0x42f4e880): Freeing message with messageId=0x0002de0c

@30,594,970us: [+0 T:0x41cb1490] ti.sdo.ce.video2.VIDDEC2 - VIDDEC2_process> Exit (handle=0x62378, retVal=0x0)

@30,595,001us: [+2 T:0x41cb1490] ti.sdo.dmai - [Vdec2] VIDDEC2_process() ret 0 inId 0 inUse 0 consumed 811008

@30,595,153us: [+0 T:0x41cb1490] ti.sdo.ce.video2.VIDDEC2 - VIDDEC2_process> Enter (handle=0x62378, inBufs=0x41cb04ac, outBufs=0x41cb04a0, inArgs=0x41cb0d10, outArgs=0x41cb0570)

@30,595,214us: [+5 T:0x41cb1490] CV - VISA_allocMsg> Allocating message for messageId=0x0002de0d

@30,595,367us: [+0 T:0x41cb1490] CV - VISA_call(visa=0x62378, msg=0x42f4e880): messageId=0x0002de0d, command=0x0

Received packet,size:18594

n=11

Received packet,size:18508

@30,678,649us: [+0 T:0x404b1210] CE - Engine_getCpuLoad(0x62c90)

[DSP] @46,898,648tk: [+5 T:0x8bf07f4c] CN - NODE> 0x8be04ea0(avsdec#0) call(algHandle=0x8be04f60<1>DSP MMU Error Fault!  MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that generated the interrupt = [0x21000a00].

DSP MMU Error Fault!  MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that generated the interrupt = [0x21000a00].

THIRD

Received packet,size:15136

n=5

@8,424,560us: [+0 T:0x404b1210] CE - Engine_getCpuLoad(0x62c90)

[DSP] @9,466,468tk: [+5 T:0x8bf07f4c] CN - NODE> 0x8be04ea0(avsdec#0) call(algHandle=0x8be04f60, msg=0x87305880); messageId=0x0002fe06

[DSP] @9,466,546tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> Enter(addr=0x867a1000, sizeInBytes=811008)

[DSP] @9,467,473tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> return

[DSP] @9,467,507tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> Enter(addr=0x86501000, sizeInBytes=811008)

[DSP] @9,468,431tk: [+0 T:0x8bf07f4c] OM - Memory_cacheInv> return

[DSP] @9,468,466tk: [+0 T:0x8bf07f4c] ti.sdo.ce.video2.VIDDEC2 - VIDDEC2_process> Enter (handle=0x8be04f60, inBufs=0x8bf0a684, outBufs=0x8bf0a748, inArgs=0x873059f8, outArgs=0x87305a04)

[DSP] @9,468,565tk: [+5 T:0x8bf07f4c] CV - VISA_enter(visa=0x8be04f60): algHandle = 0x8be04f90

[DSP] @9,468,616tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_activate> Enter(alg=0x8be04f90)

[DSP] @9,468,670tk: [+0 T:0x8bf07f4c] ti.sdo.ce.alg.Algorithm - Algorithm_activate> Exit

[DSP] @9,468,714tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_TI_process(0x87400718, 0x8bf0a748, 0x87305a04, 0x873059f8, 0x8bf0a684)

[DSP] @9,468,795tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - pGAVS_t(0x2)

[DSP] @9,468,836tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_numInBytes(811008)

[DSP] @9,694,838tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - t->height*t->width is (576*704)

[DSP] @9,694,928tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - inArgs->inputID(3)

[DSP] @9,694,981tk: [+0 T:0x8bf07f4c] ti.sdo.ce.examples.codecs.avsdec - AVSDEC_n<1>DSP MMU Error Fault!  MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that generated the interrupt = [0x31b4b1e0].

DSP MMU Error Fault!  MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that generated the interrupt = [0x31b4b1e0].

This is only part of the errors and Other situations are different ..SO i don't know the reason..

Thank you  very much..

Pengfei Zhan,

You need to start new threads. You will get more people looking at your question if you start a new thread. Especially since this thread has been marked answered. In general, one question for each thread; when it's answered you should start a new thread for the next question.

Re: config.bld file. If I understand correctly, you added an if-statement around the GCArmv5T target code? This just makes sure that you have assigned a tool chain for the GCArmv5T target before using it. Maybe these two sources will help.

http://processors.wiki.ti.com/index.php/Codec_Engine_Examples
codec_engine_2_24/examples/build_instructions.html

Re: the assembly errors. It looks to me that your assembly code is doing resource allocations (.D2T2, .S2X, etc). I don't' think your assembly should be doing this. Usually, the assembler manages the resources. It looks like you captured dis-assembly code and are now trying to assemble it again. I'm not an assembly expert, so you might try posting that questions to the compiler group. Try Development Tools > TI C/C++ Compiler forum.

Re: the MMU faults. You can see the virtual address which raised the MMU fault from the error message:

Virtual DSP addr reference that generated the interrupt = [0x144a6200].

You need to figure out where this address is coming from. You can check the DSP map file to see if its a memory map issue, in which case you need to add an entry into your memory map so it get mapped into the MMU. Or if could be a bad address. You can try using the CCS debugger to step through the code until the fault occurs. Maybe the following link will help.

http://processors.wiki.ti.com/index.php/DSP_MMU_Faults

You can also search the forums for similar posts.

Please start new threads with new questions.

Thanks
~Ramsey