We are working with an LCD display that requires HSYNC and VSYNC both fall at the same time in order to start a frame and toss the number of invalid lines specified by the (vertical synchronization pulse width plus vertical back porch). This does not appear possible due to how the syncs are being generated by the OMAP. In our case, this causes screen flickering.
Referring to the OMAP35x TRM (spruf90u) document figure 15.21 (which is active low VSYNC and HSYNC configuration 2 (Start of Frame)), it appears the OMAP will always generate the HSW (horizontal synchronization width) before the VSW (vertical synchronization width) thus HSYNC will be driven low for HSW clocks before the VSYNC is driven low.
Can someone confirm this is the case and that there is no setting available to allow the HSW and VSW to start together?
Given http://e2e.ti.com/support/dsp/omap_applications_processors/f/447/t/31366.aspx, I suspect this is the case.
Thanks.