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How many time we need to read/write 64 MB from/to DDR2 RAM of BeagleBone

Vinh Hung Hoang
Prodigy 40 points

Hi,

i'm testing 64MB DDR2 RAM of BeagleBone with simple algorithm ( wirte 0xffffffff, read, compare and then write 0x00000000). My RAM test program runs about 10 (s) on OCMC RAM ( RAM on chip). I think it runs too slow.

I try to find time to access DDR2 RAM, so i write a simple program ( only write 0xffffffff to 64MB DDR2 RAM ), and it runs about 2,5 (s).

I read datasheet of DDR2 RAM (Micro company), change parameter of RAM timings ( Register of EMIF ), ... but not effect.

I don't think, my result is good. So how many time we need to read/write 64 MB from/to DDR2RAM?

Regards

ht

  • 0
    TI__Mastermind 40080 points

    Are you writing your program to run under an OS?

    With the BeagleBone you should have received an SD card that is running a linux kernel and filesystem from the Sitara Linux SDK.  

    In this directory /usr/bin in the SD card (Sitara SDK, not the Angstrom) that comes with the are several programs such as this one for measuring the DDR BW

    ./runLmDDRBandwidth.sh

    Using the Sitara SDK there is something "Remote Matrix" that will allow to access the board over ethernet using a web browser, here is lab on how to do that:

    http://processors.wiki.ti.com/index.php/Sitara_Linux_Training:_Hands_on_with_the_SDK#Out-Of-Box_Experience

    You will want to go to step 4 on how to access the remote interface. When you are able to access the remote interface you will an icon with ARM Benchmarks, under this icon are several tests that can be run.

     

  • 0 in reply to Schuyler Patton
    TI__Intellectual 1375 points

    Hi,

    you can use these measurments to have an idea about the DDR-Bandwidth. I started the measurments on the AM3358EVM and got the following results (you schould get similar results on the beaglebone):

    BANDWIDTH MEASUREMENTS
 
(MB)  (MB/s)
---------------
bw_mem 1M rd
1.00 241.55
bw_mem 1M rdwr
1.00 197.39
bw_mem 1M cp
1.00 173.84
bw_mem 1M frd
1.00 231.84
bw_mem 1M fcp
1.00 169.81
bw_mem 1M bzero
1.00 868.02
bw_mem 1M bcopy
1.00 167.18
Script Complete
     
    regards,
    Wajdi
  • 0 in reply to Wajdi
    Prodigy 40 points

    Hi,

    Thanks for your reply. I think i need to say more my situation:

    1. I try to use bootloader with SPI Flash, so I have added SPI Flash to BeagleBone. Use bootloader program in Starterware ( I change some code for booing from SPI Flash) and my bootloader works  good.

    2. I use SPIFlashing Tool for loading bootloader and application ( just Led blinked) to SPI Flash. And then some code in ROM will copy bootloader to OCMC RAM. And then program bootloader, what runs in OCMC RAM will copy application to DDR2 RAM.

    3. I want to TEST DDR2 RAM, so write RAMtest program in bootloader ( before copy application to DDR2 RAM ). And my program has run as i said above.

    4. I read about delay when we access DDR2 RAM. With DDR2 RAM of BeagleBone, tCK = 3,76 ( config DDR2 RAM with 266 Mhz ), CL = 5 tCK, tRCD = 12,5 (ns), tRC = 57,5 (ns), tRP = 12,5 (ns), tRAS (min) = 45 (ns), ... This means, delay each time i read or write 4 bytes just about maximal 100 (ns) ( I think ). So with write 64MB, i have to access 16x10^6 times, each time 4 bytes. Easy to see i need ( in theory ) : 100 (ns) x 16x10^6 = 1,6 (s). But in real board, program runs about 2,5 (s) - 2,7 (s) - 2 times more :(. I don't know why? I have checked and changed configuration of DDR2 RAM with new configuration ( update of TI ) but it's not better. Or I miss some delay in somewhere??? I can't define exactly problem.

    P/S : In bootloader, i don't use any OS.

             In Application, I use µCOS ii, but with Led Blinked i only use Library of Starterware.  

             Thanks for your supports again.