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Reset Signal on C6713

Hello,

I am working on a custom C6713 board with hardware design based on DSK C6713 DSK. 

My reset circuit seems to be not working... Its a simple Circuit as in the image.

When I remove this, and take the DSP_RST signal out of CPLD from DSK, the DSP starts taking current, EMIF clk out shows a clock and board is connected via JTAG Emulator and everything is fine.

Could you please identify if am missing anything ?

I've already tried increasing RC time constant but to no avail. 

The CLKMODE0 pin has been pulled up externally.

Thanks

  • Can't seem to upload the image. The reset pin in pulled with 10k res. a capcitor(0.1uF) is connected across the reset button.

  • Mueed,

    What do you mean by "When I remove this, and take the DSP_RST signal out of CPLD from DSK"? If one reset signal works and the other does not, then look at them with an oscilloscope to figure out what is different. Or use the CPLD one.

    What does "a capcitor(0.1uF) is connected across the reset button" mean? Is the capacitor not connected to ground, or is one end of the switch at ground so you mean that the capacitor is from the switch / reset signal to ground?

    Regards,
    RandyP

  • Thanks Randy,

    Upon looking at the signal some glitches were observed when i pressed the reset button. The DSK 6713 schematics has a schmidt trigger at the input rest signal coming to the CPLD. I also used the schmidt trigger and now my problem is solved.