OMAPL138 - PLL Setup

We are using OMAPL138BZWTD4. We are trying to achieve maximum throughput, so that we are playing with PLL multiplier & PLL divisor factor. We can't able to achieve this combination for following items PLLOUT freq to 600 MHZ &  CPU Freq(SYSCLK1) to 456 MHZ & EMIF ASYNC CLK(SYSCLK3) to 148MHZ.In AIS gen not taking real numbers. Please let me know any other way to achieve the above mentioned combination.