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SYS/BIOS equivalent of DSP/BIOS memory section space

Chris Johnson1
Expert 1715 points

Hello,

I am in the process of converting a project for a C64x/C64x+ device to work with a C66x device. In DSP/BIOS I am able to add a MEM object under the "Memory Section Manager". I can't find an equivalent to this in SYS/BIOS. I have found that I can create a new RTSC platform and define the Device Memory regions myself and this seems to be the closest to what I was able to do in DSP/BIOS. Is this the way I need to do this or does SYS/BIOS have an equivalent to adding MEM objects in DSP/BIOS?

Also, in DSP/BIOS for the MEM objects I could select "Reserved" for the space parameter. When creating a new RTSC platform I don't get this option. What is the equivalent to "Reserved" space? My best guess would be to use "data" and set the access parameter to "R". Is this correct?

Regards,

Chris

Signalogic

  • 0
    TI__Mastermind 30830 points

    Chris,

    As you concluded, Memory definitions are now handled in the Platform. SYS/BIOS does not provide MEM-equivalent functionality.

    Setting the memory region attribute to 'R' only should effectively prevent the linker from placing .data and .text sections in that region.

    Alan

  • 0 in reply to Alan DeMars
    Expert 1715 points

    Thanks Alan, that clears things up.

    -Chris

    Signalogic

  • 0 in reply to Alan DeMars
    Expert 1715 points

    Alan,

    I was wondering how to use cache with custom memory definitions. I want to use the last 128k of L2SRAM for cache. I set the L2 Cache option to 128k and added a memory definition name "CACHE_L2" that starts at 0x00860000 with a length of 0, but this causes an error due to the length not being specified. I thought this was the way to do it because when you don't manually set the memory definitions it subtracts the size of cache from the length so if all of L2SRAM is set to cache the length shows as 0. What is the correct way to set cache when using custom memory definitions? Do I create a definition for cache with a length that corresponds to the setting I use or do I not need a definition at all for cache?

    Regards,

    Chris

    Signalogic

  • 0 in reply to Chris Johnson1
    TI__Mastermind 30830 points

    Chris,

    I spoke with a C6x cache expert to get a clue.

    From my understanding, when you specify the size of the L2 cache, that automatically sets the L2 base address. And that base address is independent of your platform memory definitions.

    To avoid conflict with code and data placements, in your platform you should define the size of the L2RAM to be the total L2RAM size MINUS the size of the L2 cache you specify.

    Alan

  • 0 in reply to Alan DeMars
    Expert 1715 points

    Alan,

    Thanks for the help. I have just one last question for now. What is the SYS/BIOS equivalent to GBL_initdone from DSP/BIOS? I have read that:

    "BIOS plug-ins should clear GBL_initdone on target on restart/reset event"

    I was doing this previously in my project but wasn't sure what to use when working with SYS/BIOS.

    Regards,

    Chris

    Signalogic

  • 0 in reply to Chris Johnson1
    TI__Mastermind 30830 points

    I don't think this applies to SYS/BIOS.

    Alan

  • 0 in reply to Alan DeMars
    Expert 1715 points

    Alan,

    Ok good to know. Thanks for all the help and quick replies.

    Regards,

    Chris

    Signalogic