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CSL thread safety for EDMA on C6678

Sydney Retzel
Prodigy 100 points

I am using the CSL EDMA routines on the C6678 ( not using SYS/BIOS yet ).

As this is a high level API, I want to understand whether it is thread safe.  I intend to program the EDMA from all my cores using a different PaRAM set for each core.

I do not have a good idea about which routines are thread safe or not.  I assume for routines that set shared registers we would need to manually xor the existing value.

Should I assume none of the routines are thread safe and protect all access with a CSL semaphore?

  • 0
    TI__Mastermind 23525 points

    Sydney,

    There is some HW protection that will prevent a given core from stepping on resources assigned to a different core.  This is done with the shadow regions and memory protection registers.  For example...

    - Use the DCHMAPn register to map PaRAM set to a given EDMA channel

    - Use the DRAEm and DRAEHm registers to assign EDMA channels to a Shadow Region (Shadow regions are uniquely memory mapped, so this alone provides some protection if there is an agreed upon use model by the cores when using the EDMA)

    - Then use the MPPAG/MPPA(n) registers to assign a core's PrivID to a Shadow Region to allow only that core to access those resources. Now the one issue I see is that MPPA registers are configured to allow individual restriction/access to Shadow regions 0-5, but shadow regions 6 & 7 are lumped together. There may be a way to use the Global address region for core 7 to limit the exposure and only allow that core to step on other cores.

    I doubt the APIs check these privileges before using resources and are not thread safe, but I will ask the driver developer to chime in and confirm.

     

    Hope that helps,

    Travis