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TMS320C50 FREE and SOFT bits in the SPC

Brandon Reeves
Intellectual 1540 points

Issue:

With regards to the TMS320C50 device I cannot determine the context of the FREE and SOFT bits in the SPC where they describe a halt.

Background:

User guide:

User GUIDE Tables 9-13 and 9-14 (page 537+) –I know the FREE and SOFT bits are related to stopping the serial port.

Questions:

What is the nature of the "halt" to which these bits apply? Is it a processor halt, or an interruption in available data to be transmitted, or is it simply direct software control?

Also does the clock pin actually stop toggling or just the data? And lastly, what does it mean to stop the _receiver_ clock in the case where it is an input?

 Links to documentation:

User Guide: http://www.ti.com/lit/ug/spru056d/spru056d.pdf

 

Thanks everyone!

 

-Brandon Reeves

  • 0
    TI__Expert 5745 points

    Hey Brandon,

    The SOFT and FREE bits - as far as I know - are bits that are only used in emulation. These bits determine the state of the serial port clock when a block of running code encounters a breakpoint.

    If the FREE bit is set to 1, and a software breakpoint is encountered, the clock continues to run freely and data will still shift out. When FREE is set to 1, the SOFT bit is a don't care.

    If the SOFT bit is set to 1 and a transmission is in progress, that transmission is allowed to finish. Once completed, the clock halts.

    If the SOFT bit is cleared to 0, then clock stops immediately.

    I found this and more information on the c5000 serial port here: www.ti.com/ww/cn/uprogram/share/ppt/c5000/09McBSP_v104.ppt

    Best,

    Keegan