I have a system setup to serially transfer data to a peripheral, the peripheral takes the bits in 64 bit chunks and loads them sideways into the 8 channel interfaces it provides, it requires a sync pulse each 2048 bits. I am using EDMA -> McBSP to do this, the McBSP provides the sync pulse by counting elements as it transmits them.
I am getting intermittent off by 4 channel errors on the peripheral sometimes at start up, ie the 64 bit elements it is processing are either spot on or off by 32 bits WRT the sync pulse.
I think the root of my problem is that hte McBSP works in at most 32 bit elements, so it is configured for double the number of elements but at half the size. The McBSP is counting whole elements but naturally these are half elements for my peripheral and hence off by 1's are understandable.
Any suggestions?
I tried telling EDMA to do 64 bit transfers and I tried using both phases of the McBSP, niether worked/helped. RIght now all I can do is reset the McBSP until I get lucky.
How about adding one to the define for 32 bits - might that be all implemented but reserved because of the overall 4096 bit phase limit?
Chris