I'm going to be interfacing an ADS1274 with an OMAP-L138 using one of the McBSP ports, and I'm a bit confused about the best way to do it. After reading the docs, I came up with the following, which was consistent with the approach suggested in this post: Connect CLKR on the OMAP to CLK and SCLK on the ADC, and connect FSR on the OMAP to FSYNC on the ADC. Configure both CLKR and FSR as outputs and configure CLKR to be the inverse of CLKR_int (i.e. PCR.CLKRP = 1).
Does the above sound correct? My confusion comes from this post, which seems to imply that the timing between the two devices doesn't guarantee the above will work. The second to last message on that thread proposes two solutions. The first one configures McBSP as described above but claims that the timing is such that the data isn't guaranteed to be valid on the falling edge of CLKR_int. Is this the same issue that caused the ADS1274 EVM to run DOUT through a D flip-flop? The second solution involves using FSX/CLKX instead of FSR/CLKR to drive the ADC1274, and also feeding those signals back into FSR/CLKR after reclocking FSX to produce FSR. It seems to me like the crux of the problem is that in that example the clock period is to close to the ADS1274's t_DOPD (SCLK falling edge to DOUT valid). But if I'm running the ADS1274 in low-speed mode with a much slower clock none of the timing related problems discussed in that post apply. Does that sound correct? From the timing diagrams for the ADS1274, it still looks like CLKR needs to be inverted (i.e. set PCR.CLKRP to 1).
