dot product using LDW

abdalla ali

Hello all

I'm about to write a code of floating point dot-product using software pipelining for TMS320C6713 by using LDW . I encountered a problem in the accumulation of the multiplication result ( I think it's loop carry path problem because the addsp require 4 cycles to complete ) . How can I solve this issue . I blevie that LDDW will be more effecitiant . I try it ...but how can i deal with odd number of multiplication( if count is an odd number ) ...one solution is done by add a zero coef at the end of the coefficient array but if i don't know the value of count if it even or odd

here the C code

float dot-product(float *in, float *coef, int count)
{
   int i;
   float sum = 0;

   for (i=0; i < count; i++)
   {
       sum = sum + in[i] * coef[i];
   }

   return(sum);
}

thank you ^_^

over 12 years ago

RandyP over 12 years ago

TI__Guru* 84110 points

Abdalla,

Turn on the maximum optimization for the C compiler and use some of the optimization pragma's described in the Compiler User's Guide and in the TI Wiki Pages (search for "C6000 Optimization" or "C6000 pipelining" [no quotes for either]). Then see how the compiler does things and do your manual optimization on that assembly output. Use the -k and -al optimization switches to get the assembly or listing files, respectively.

Hints: use restrict, UNROLL, MUST_ITERATE, and manual unrolling of the loop.

Advanced hint: use parallel sums, like sum0 and sum1 for even and odd, or even sum0, sum1, sum2, sum3.

Regards,
RandyP

abdalla ali over 12 years ago in reply to RandyP

Intellectual 750 points

here is an LDDW code prolog + loop

    .global _dotp
_dotp:
;cycle 1
       MV   .S1      A6,A1    ;loop count

   ||     ZERO   .L1   A7       ;init accum A7
   ||       ZERO   .L2   B7       ;init accum B7
   ||       LDDW   .D1   *A4++,A3:A2   ;64-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;64-bit data in B2 and B3
;cycle 2
            LDDW   .D1   *A4++,A3:A2   ;64-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;64-bit data in B2 and B3
;cycle 3
            LDDW   .D1   *A4++,A3:A2   ;64-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;64-bit data in B2 and B3
;cycle 4
            LDDW   .D1   *A4++,A3:A2   ;64-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;64-bit data in B2 and B3
   ||   [A1]   SUB   .S1   A1,2,A1   ;decrement count
;cycle 5
            LDDW   .D1   *A4++,A3:A2   ;64-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;64-bit data in B2 and B3
   || [A1]   SUB   .S1   A1,2,A1   ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
;cycle 6
            LDDW   .D1   *A4++,A3:A2 ;64-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;64-bit data in B2 and B3
   || [A1]   SUB   .S1   A1,2,A1   ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   ||       MPYSP   .M1x   A2,B8,A6   ;lower 32-bit product into A6
   ||       MPYSP   .M2x   B9,A3,B6   ;upper 32-bit product into B6
;cycle 7
            LDDW   .D1   *A4++,A3:A2   ;32-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;32-bit data in B2 and B3
   || [A1]   SUB   .S1   A1,2,A1   ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   ||       MPYSP   .M1x   A2,B8,A6   ;lower 32-bit product into A6
   ||       MPYSP   .M2x   B9,A3,B6   ;upper 32-bit product into B6
;cycle 8
            LDDW   .D1   *A4++,A3:A2   ;32-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;32-bit data in B2 and B3
   || [A1]   SUB   .S1   A1,2,A1   ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   ||       MPYSP   .M1x   A2,B8,A6   ;lower 32-bit product into A6
   ||       MPYSP   .M2x   B9,A3,B6   ;upper 32-bit product into B6
;cycle 9
            LDDW   .D1   *A4++,A3:A2   ;32-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;32-bit data in B2 and B3
   || [A1]   SUB   .S1   A1,2,A1   ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   ||       MPYSP   .M1x   A2,B8,A6   ;lower 32-bit product into A6
   ||       MPYSP   .M2x   B9,A3,B6   ;upper 32-bit product into B6
;cycles 10-109 (loop kernel)
LOOP:         LDDW   .D1   *A4++,A3:A2   ;32-bit data in A2 and A3
   ||       LDDW   .D2   *B4++,B9:B8   ;32-bit data in B2 and B3
   || [A1]   SUB   .S1   A1,2,A1   ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   ||       MPYSP   .M1x   A2,B8,A6   ;lower 32-bit product into A6
   ||       MPYSP   .M2x   B9,A3,B6   ;upper 32-bit product into B6
   ||       ADDSP   .L1   A6,A7,A7   ;accum in A7
   ||       ADDSP   .L2   B6,B7,B7   ;accum in B7

----------------------------

the LDW code prolog + loop

        MV   .S1      A6,A1    ;loop count

   ||         ZERO   .L1   A7       ;init accum A7
   ||       ZERO   .L2   B7       ;init accum B7
   ||       LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
;cycle 2
            LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
;cycle 3
            LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
   ||   [A1]   SUB   .S1   A1,1,A1            ;decrement count
;cycle 4
            LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
   ||   [A1]   SUB   .S1   A1,1,A1            ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
;cycle 5
            LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
   || [A1]   SUB   .S1   A1,1,A1            ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
;cycle 6
        LDW   .D1   *A4++,A3        ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
   || [A1]   SUB   .S1   A1,1,A1            ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   || MPYSP   .M1x   A3,B9,A6   ;32-bit product into A6
;cycle 7
            LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
   || [A1]   SUB   .S1   A1,1,A1            ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   ||       MPYSP   .M1x   A3,B9,A6   ;32-bit product into A6
;cycle 8
            LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
   || [A1]   SUB   .S1   A1,1,A1            ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   ||       MPYSP   .M1x   A3,B9,A6   ;32-bit product into A6
;cycle 9
            LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
   || [A1]   SUB   .S1   A1,1,A1            ;decrement count
   || [A1]   B   .S2   LOOP       ;branch to LOOP
   ||       MPYSP   .M1x   A3,B9,A6   ;32-bit product into A6

LOOP:     LDW   .D1   *A4++,A3   ;32-bit data in A3
   ||       LDW   .D2   *B4++,B9   ;32-bit data in B9
       ;branch to LOOP
          || [A1]   SUB   .S1   A1,1,A1            ;decrement count
   || [A1]   B   .S2   LOOP
   ||       MPYSP   .M1x   A3,B9,A6   ;32-bit product into A6

   ||       ADDSP   .L1   A6,A7,A7   ;accum in A7

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dot product using LDW