Hello.
We made board with C6678. In first batch of our board avery thing work perfect: DDR3-1333, PCIe, EMIF16, and GigaEth. But when we produced another batch of boards (the same schematics and layout) we starded to get some errors on the DDR3 tests on Lane0 and 1. The problem is that sometimes a couple of address were written at the same time in very randomalic manier (most of the errors in the second half of the memory). In example if we write 0xAAAAAAAA 0xAAAAAAAA at the some address, we recieved alse writes in other, very far address, 0xAAAA0000 0x00000000. It seams as some problems in Lane0 and 1.
Schematics and layout like in EVB, also software parametres the same. Silicon version is 1.0.
Thanks you.
