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AM3354 24 bit LCD data mapping

Other Parts Discussed in Thread: AM3354, AM3358

Hai Support,

We are using the LCD controller from AM3354 in 24bit mode. We are using the data mapping for video data as show in the below table. This mapping is taken from the errata as it says to use like this. In the evaluation board it is not clear as it is going through FPGA in between. Kindly confirm the below pin mapping.

AM3354

TFT LCD

LCD_DATA23

R0

LCD_DATA20

R1

LCD_DATA17

R2

LCD_DATA11

R3

LCD_DATA12

R4

LCD_DATA13

R5

LCD_DATA14

R6

LCD_DATA15

R7

LCD_DATA22

G0

LCD_DATA19

G1

LCD_DATA5

G2

LCD_DATA6

G3

LCD_DATA7

G4

LCD_DATA8

G5

LCD_DATA9

G6

LCD_DATA10

G7

LCD_DATA21

B0

LCD_DATA18

B1

LCD_DATA16

B2

LCD_DATA0

B3

LCD_DATA1

B4

LCD_DATA2

B5

LCD_DATA3

B6

LCD_DATA4

B7

  • Hi Abdul,
     
    You have swapped red and blue data. Errata 3.1.1 says that "In order to correctly display RGB888 data from the SGX, or any source formatted as RGB in memory, it is necessary to connect the LCD panel as shown in Figure 2", and your red and blue do not correspond to it.
     
    Best Regards
    Biser

    .

  • Hai Biser,

    Sorry for putting the wrong data. By mistake I copied the old data. This is what we are using it.

    AM3354

    TFT LCD

    LCD_DATA21

    R0

    LCD_DATA18

    R1

    LCD_DATA16

    R2

    LCD_DATA0

    R3

    LCD_DATA1

    R4

    LCD_DATA2

    R5

    LCD_DATA3

    R6

    LCD_DATA4

    R7

    LCD_DATA22

    G0

    LCD_DATA19

    G1

    LCD_DATA5

    G2

    LCD_DATA6

    G3

    LCD_DATA7

    G4

    LCD_DATA8

    G5

    LCD_DATA9

    G6

    LCD_DATA10

    G7

    LCD_DATA23

    B0

    LCD_DATA20

    B1

    LCD_DATA17

    B2

    LCD_DATA11

    B3

    LCD_DATA12

    B4

    LCD_DATA13

    B5

    LCD_DATA14

    B6

    LCD_DATA15

    B7

  • Yes Abdul, this is the correct one.
     
    BR
    Biser
  • I'm using an AM3358 but I assume the above comments will apply.

    My question is about how to connect and 18 bit LCD panel.  

    In the http://processors.wiki.ti.com/index.php/LCD_connectivity page under Connection to Parallel CMOS LCDs , it says "One method is to pack the connections in the lower data bits of the parallel output, e.g. bits 0-17 for an 18 bit LCD (6 bits per color), in which case the OMAP display sub system should be configured for 18 bit output."

    If I do this the proper connections will be:

         AM3354                          TFT LCD

         LCD_DATA17                 B0

         LCD_DATA11                 B1

         LCD_DATA12                 B2

         LCD_DATA13                 B3

         LCD_DATA14                 B4

         LCD_DATA15                 B5

         LCD_DATA16                 R0

         LCD_DATA0                  R1

         LCD_DATA1                  R2

         LCD_DATA2                  R3

         LCD_DATA3                 R4

         LCD_DATA4                 R5

         LCD_DATA5                 G0

         LCD_DATA6                 G1

         LCD_DATA7                 G2

         LCD_DATA8                 G3

         LCD_DATA9                 G4

         LCD_DATA10               G5

    Is this correct?

    Thanks.

  • I just realized that I was reading from the AM/DM37xx and the Display Subsystem is not the same as the AM335x.

    Is there an example of how to set up the AM335x for a 18 bit TFT?

    Thanks. 

  • Hi Peter,
     
    The AM335X LCD controller supports only RGB-565 or RGB-888. The proper connections can be found in the Errata Section 3.1.1 (http://www.ti.com/lit/er/sprz360c/sprz360c.pdf). For an 18-bit LCD you can use the 24-bit connections and connect the highest 6 bits for each color.
  • Hi, I followed the similar connections as discussed in this post/errata but it seems red and blue colors are swapped while displaying data on newhaven 3.5" TFT. Please help me. Thanks in advance

  • Check your LCD controller settings. They should match your LCD connections. What you say sounds like you have RGB-565 settings over RGB-888 connections or vice versa.