So I am looking at the PORZ pin signal - this pin is driven directly by a TXB0102 with a 100K Ohm pull down - there are no ther pins connected to this signal. The signal out of the level translator looks kind of funky and I am wondering if the processor is able to read the SYSBOOT with this waveform. I have attached a drawing I made of the signal (can't get a scope shot here). It appears that perhaps the processor is grabbing and controlling the PORZ signal once it hits about 0.8v. The signal into the TXB0102 has a nice clean rise.