AM335x : problem with 0x7 = DIV8 : SYS_CLKOUT2/8

Suchit Bhatt

Intellectual 315 points

when we set 0x7 in CM_CLKOUT_CTRL register for SYS_CLKOUT2/8 we dont get output clock, however it works

for 0x5 and 0x6, for input we are using 192MHz clock.

over 12 years ago

0 Biser Gatchev-XID over 12 years ago

TI__Guru**** 393215 points

What is your source clock? Please post the exact value you write to CM_CLKOUT_CTRL.

Thanks

Biser

0 Suchit Bhatt over 12 years ago in reply to Biser Gatchev-XID

Intellectual 315 points

Hello,

File name is rowboat-kernel/arch/arm/mach-omap2/board-am335xevm.c

void __iomem *base;
unsigned int val;
base = ioremap(0x44E00700, SZ_4K);
val = (7 << 3) | (3 << 0);
writel(val, base);
iounmap(base);
setup_pin_mux(clkout2_pin_mux);

Source Clock is 192MHz register CM_CLKOUT_CTRL is set to 0xBF,(10111111) to get 24MHz output.

0 Biser Gatchev-XID over 12 years ago in reply to Suchit Bhatt

TI__Guru**** 393215 points

I don't see how you set CM_CLKOUT_CTRL bit 7 = 1 (CLKOUT2EN). 0xBF is correct value, but it seems to me you write 0x3F.

Biser

0 Suchit Bhatt over 12 years ago in reply to Biser Gatchev-XID

Intellectual 315 points

we use above code in board init, at runtime we enable/disable clock using clock_enable() api of kernel. Also we tested by writting 0xFF during init time but still it doesnt work.

We have tested above mechanism to work for clk/6 and clk/7

0 JJD over 12 years ago in reply to Suchit Bhatt

TI__Guru* 86180 points

Suchit,

/8 is not supported. It will be removed from the TRM in the next revision.

Regards,

james

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AM335x : problem with 0x7 = DIV8 : SYS_CLKOUT2/8