configure CORE_CLKOUTM4 clock source

Keldy

hi,

i'm using AM335x with PSP 04.06.00.07, i need a high speed GPIO_1 module so that i can trigger the GPIO1 output (on and off) in 4Mhz, and can detect a input signal (logic level high) which is also 4Mhz.

the original setting of CORE_CLKOUTM4 clock source is 200Mhz divide by 10, so the GPIO_1 module have 20Mhz. But i failed to trigger the output in 4Mhz and failed to detect 4Mhz input signal. Normally the module clock need 10 times bigger than output or input signal, i think i need the GPIO_1 module to have 40Mhz.

How i configure the GPIO_1 module interface clock to have 40Mhz clock?

Thanks & regards

Keldy

over 13 years ago

0 Biser Gatchev-XID over 13 years ago

TI__Guru**** 393215 points

Hi Keldy,

You can check TRM section 8.1.6.6.1 Core PLL Configuration on how to do this. However be careful, CORE_CLKOUTM4 clock is used throughout the processor and will definitely affect a lot of other peripherals if changed.

Best Regards

Biser

0 Keldy over 13 years ago in reply to Biser Gatchev-XID

Expert 1835 points

Hi Biser,

CORE_CLKOUTM4 divider value is 10 by default, changing to 5 or 1 will cause the processor "hang". i think i have make a mistake, refer to TRM Table 8-20 Core PLL Typical Frequencies(Mhz), The CORE_CLKOUTM4 configure as 200Mhz by default. is it enough for detect a 4Mhz input signal? or output 4Mhz signal?

In Kernel Space, i write my module by using ioremap() to map the GPIO_1, will my code complexity cause the delay ?

my code is as following:

static unsigned char *mmio;

volatile unsigned int *gpio_dir, *gpio_out, *gpio_in;

int core_init(void)

{

mmio = ioremap(GPIO1_BASE, GPIO_SIZE); //GPIO1 mapping

gpio_dir = (unsigned int *)(mmio + GPIO_DIR); //GPIO1 direction register mapping

gpio_out = (unsigned int *)(mmio + GPIO_OUT); //GPIO1 output register mapping

*gpio_dir &= ~(1 << 0); //set gpio1 pin 0 to output

while(1)

{

*gpio_out |= (1 << 0); //set gpio1 pin 0 to high

*gpio_out &= ~(1 << 0); //clear gpio 1 pin 0 to low

}

return 0;

}

when i insert this module, measure the frequency and i get 909khz. is it my code delay problem or the CORE_CLKOUTM4 problem ?

Thanks and Regards

Keldy

0 Biser Gatchev-XID over 13 years ago in reply to Keldy

TI__Guru**** 393215 points

Hi Keldy,

There are quite a lot of post on this forum on GPIO toggling speed. This one for example:

http://e2e.ti.com/support/dsp/sitara_arm174_microprocessors/f/791/p/202814/720825.aspx#720825

You can use the search to locate others. To summarize, the L3 and especially L4 interconnects are the major factor. There is a suggestion in the above link how to work around this.

Best Regards

Biser

0 Keldy over 13 years ago in reply to Biser Gatchev-XID

Expert 1835 points

Hi,

after i read through the link, i can't use the PRU module to toggle my output, because my custom board, the output is connected to GPMC_A4 pin, which is GPIO1_20 and also PR1_MII1_TXD0. But according to TRM, PR1_MII1_TXD0 can't configure as output.

For detect 4Mhz input signal, do i still need the PRU module? or i can use the normal GPIO module to detect ?

Thanks and Regards

Keldy

0 Keldy over 13 years ago in reply to Keldy

Expert 1835 points

Hi,

How i work around with the interconnection since it dont have provided register for me to configure?

Are you mean that to configure the bus interace clock?

Thanks and Regards

Keldy

0 Keldy over 13 years ago in reply to Keldy

Expert 1835 points

Hi,

If i turn off other modules and turn on only GPIO module, will it make the CPU focus on service GPIO module ?

or the CPU still will try to service each module, one by one?

Thanks and Regard.

Keldy.

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configure CORE_CLKOUTM4 clock source