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C66xx gpio: is mfence required

Ian Cole
Intellectual 320 points

Hi,

If we use the gpio CSL api found in csl_gpioAux.h e.g.

CSL_GPIO_setOutputData(x,x)

Is there a requirement to use MFENCE to enforce timing between setting different GPIO pins? (e.g. when bit bashing I2C)

Thanks

Ian

  • 0
    TI__Intellectual 2790 points

    Hello Ian

     

    I looked into the csl_gpioAux.h and at the CSL_GPIO_setOutputData(x,x) function and do not see any mention of MFENCE as a precondition. I looked into the datasheet and see that MFENCE...

     

    "This instruction [MFENCE] will create a DSP stall until the completion of all the DSP-triggered memory transactions, including:

    • Cache line fills

    • Writes from L1D to L2 or from the CorePac to MSMC and/or other system endpoints

    • Victim write backs

    • Block or global coherence operations

    • Cache mode changes

    • Outstanding XMC prefetch requests

    This is useful as a simple mechanism for programs to wait for these requests to reach their endpoint."

     

    So unless you are doing one of those function specifically, there is no need to use MFENCE with CSL_GPIO_setOutputData(x,x)


    Thanks

    Elush Shirazpour

     

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