Cache mode - ECPY

Hi Gunjan,

Thanks for the response.

I checked with the XDC cfg file. I only have the line:

ECPY = xdc.useModule('ti.sdo.fc.ecpy.ECPY');

and ECPY.cachedIresMode is not set to anything.So it must be taking default library. But while debugging I observed the code(for ECPY_directConfigure) with non cached mode is being executed. So I was just curious if the default library is ecpy.a & not the "cache mode" ecpy_cacheMode.a library.

Regards,

Vijay

Hi Vijay,

default library is the ecpy_cacheMode.a*.

If you did not override the ECPY.cachedIresMode = false, you should get linked against the default "cache mode" ecpy_cacheMode.a* library.

If you are observing something else, you should check how you are building your application. If you are using RTSC tooling (xdc) to build your application, you may want to locate the .xdl file in your application build package/... and see which ecpy library is actually getting linked.

Murat 

Hi Murat,

I checked in .xdl file from application's build package/ & the non-cached library ecpy.a is being used. I am not overriding with ECPY.cachedIresMode = false in application's .cfg file. Is there a possibility that the default cache mode is overridden anywhere else?

Anyways I shall use cache mode library by setting ECPY.cachedIresMode = true in .cfg file.

Regards,

Vijay

Vijay,

Sorry, the cachedIresMode used to default to "false" in older releases (3.21). In the 3.22 release, we changed the default to true when we added support for scratch allocation of these handles.

I will invite Murat to comment as well, but in the 3.21 release you may be looking at a performance vs memory footprint trade off. 

Using "cachedIres" will give you better performance at the expense of higher consumption of memory (IRES handles will now be cached inside the ECPY handle). If you could share your .cfg file with us, maybe we can provide a better suggestion.

Thanks,

Gunjan.

Hi Gunjan,

I was not able to attach the .cfg file. So I have copied it's contents below:

/*
********************************************************************************
var Startup = xdc.useModule ("xdc.runtime.Startup");
var System = xdc.useModule ("xdc.runtime.System");
var SysStd = xdc.useModule('xdc.runtime.SysStd');
System.SupportProxy = SysStd;

var Memory = xdc.useModule('xdc.runtime.Memory');

var Task = xdc.useModule ("ti.sysbios.knl.Task");
var BIOS = xdc.useModule ("ti.sysbios.BIOS");

var Settings = xdc.useModule('ti.sdo.ipc.family.Settings');
var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');

/* Set up gt trace defaults: added for using ECPY */
var Program = xdc.useModule('xdc.cfg.Program');

/* specify stack size */
Program.stack = 0x4000;
Program.argSize = 0x8;
/*Program.heap = 0x9000;*/
/* specifiy stack size for the idle task */
Task.idleTaskStackSize = 0x1000;

/* specify heap size */
BIOS.heapSize = 0xA000;

/* The following is for using BIOS IPC */
/* specify startup first function that sets local MultiProc id */
Startup.firstFxns.$add('&setLocalId');

var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
var GateMP = xdc.useModule('ti.sdo.ipc.GateMP');
var Notify = xdc.useModule('ti.sdo.ipc.Notify');

/* specify core IDs in IPC. */
var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
/* Core list */
MultiProc.setConfig(null, ["CORE0","CORE1","CORE2","CORE3","CORE4","CORE5","CORE6","CORE7"]);

/* Shared Memory in SL2 */
Program.global.APPNUM = -1;
Program.global.shmSL2Base = 0x0C000000;
Program.global.shmSL2Size = 0x80000;

var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
SharedRegion.translate = false;
SharedRegion.setEntryMeta(0,
{ base: Program.global.shmSL2Base,
len: Program.global.shmSL2Size,
ownerProcId: 0,
isValid: true,
cacheEnable: true,
cacheLineSize: 64,
name: "ipc_internal_shared_mem",
});
/* Software barrier and shared global with BIOS IPC */
var NameServer = xdc.useModule("ti.sdo.utils.NameServer");
var params = new NameServer.Params;
Program.global.barrierTable = NameServer.create("barriers", params);
Program.global.shmTable = NameServer.create("codecshm", params);

/*Added for using ECPY */
var DSKT2 = xdc.useModule('ti.sdo.fc.dskt2.DSKT2');
xdc.useModule('ti.sysbios.xdcruntime.Settings');

/* Configure heap for FC use */
var internalMemorySegment; /* Variable to identify internal memory section*/
var intHeapSize = 0x8000; /* Size to make internal heap */
internalMemorySegment = "L2SRAM";
Program.sectMap[".INTMEM_HEAP"] = internalMemorySegment;

var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var heapMemParams = new HeapMem.Params();
heapMemParams.size = intHeapSize;
heapMemParams.sectionName = ".INTMEM_HEAP";
Program.global.INTMEM_HEAP = HeapMem.create(heapMemParams);

/* Configure DSKT2 heaps and scratch */
DSKT2.ALLOW_EXTERNAL_SCRATCH = false;

DSKT2.DARAM0 = "INTMEM_HEAP";
DSKT2.DARAM1 = "INTMEM_HEAP";
DSKT2.DARAM2 = "INTMEM_HEAP";

DSKT2.SARAM0 = "INTMEM_HEAP";
DSKT2.SARAM1 = "INTMEM_HEAP";
DSKT2.SARAM2 = "INTMEM_HEAP";

DSKT2.ESDATA = "INTMEM_HEAP";
DSKT2.IPROG = "INTMEM_HEAP";
DSKT2.EPROG = "INTMEM_HEAP";

DSKT2.DSKT2_HEAP = "INTMEM_HEAP";

/*var Semaphore = xdc.useModule('xdc.runtime.knl.SemThread');*/
/*xdc.useModule("ti.sdo.fc.trace.gt.GT");*/
/*xdc.useModule("ti.sdo.fc.utils.gtinfra.GTINFRA");*/

/*
* Configure the RMAN to be used
*/

var RMAN = xdc.useModule('ti.sdo.fc.rman.RMAN');
var EDMA3CHAN = xdc.useModule('ti.sdo.fc.ires.edma3chan.EDMA3CHAN');
var META = xdc.useModule('ti.sdo.fc.edma3.Settings');

/*var BUFRES = xdc.useModule('ti.sdo.fc.ires.bufres.BUFRES');*/
var EDMA3LLD = xdc.loadPackage('ti.sdo.edma3.rm');

RMAN.useDSKT2 = true;
RMAN.yieldSamePriority = true;
RMAN.tableSize = 10;

META.controllerId = 1; /*Use EDMA instance 1 */

var ECPY = xdc.useModule('ti.sdo.fc.ecpy.ECPY');
ECPY.persistentAllocFxn = "DSKT2_allocPersistent";
ECPY.persistentFreeFxn = "DSKT2_freePersistent"

Program.sectMap[".text"] = "MSMCSRAM";
Program.sectMap[".text:cabac"] = "MSMCSRAM";
Program.sectMap[".stack"] = "L2SRAM";
Program.sectMap[".cinit"] = "MSMCSRAM";
Program.sectMap[".cio"] = "L2SRAM";
Program.sectMap[".const"] = "ERAM";
Program.sectMap[".qpTable_shared_dtcm2"] = "MSMCSRAM";
Program.sectMap[".switch"] = "L2SRAM";
Program.sectMap[".args"] = "MSMCSRAM";
Program.sectMap[".bss"] = "L2SRAM";
Program.sectMap[".bios"] = "L2SRAM";
Program.sectMap[".fardata"] = "L2SRAM";
Program.sectMap[".neardata"] = "L2SRAM";
Program.sectMap[".rodata"] = "L2SRAM";
Program.sectMap[".tables"] = "ERAM";
Program.sectMap[".cabactables"] = "MSMCSRAM";
Program.sectMap[".intDataMem"] = "L2SRAM";
Program.sectMap[".sysmem"] = "L2SRAM";
Program.sectMap[".far"] = "L2SRAM";
Program.sectMap[".outPutBuffMem"] = "ERAM";
Program.sectMap[".inputbuffer_mem"] = "ERAM";
Program.sectMap[".output_buffer"] = "ERAM";
Program.sectMap[".ERAM"] = "ERAM";
Program.sectMap[".extMem_Pool"] = "ERAM";
Program.sectMap[".constTables"] = "MSMCSRAM";
Program.sectMap[".external_cached_mem"] = "ERAM";
Program.sectMap[".shared_mem_DDR2"] = "ERAM";
Program.sectMap[".shared_mem_SL2"] = "MSMCSRAM";

********************************************************************************
*/

Regards,

Vijay

Vijay,

Looking at the release you are using and your cfg file, I will stand by the statement I made before. For higher performance, you may want to set cachedIres to true, this will however increase your memory consumption.

Leaving it to false, the way it is, is fine is memory might be scarce.

In more recent releases of FC (framework_components_3_22_03_09 onwards), there is an option to stash these ires handles (and other ECPY data structures) in (DSKT2's) shared scratch memory. That, when used in conjunction with cachedIres set to true, will give you higher performance, without affecting memory consumption by much.

Gunjan.

Hi Gunjan,

Thanks for the suggestion. I shall use cfg with cachedIres set to true.

Regards,

Vijay