Transition in PSC MDSTATn STATE occurs before setting PTCMD GO[0] after writing to MDCTL[n] NEXT

Hi,

according to "TMS320DM643x DMP DSP Subsystem, section Power and Sleep Controller, 6.4.2 Module State Transition" you can set multiple NEXT bits in MDCTLn before setting GO[0], as described below.

1. Wait for the GOSTAT[0] bit in PTSTAT to clear to 0. You must wait for any previously initiated transitions to finish before initiating a new transition.
2. Set the NEXT bit in MDCTLn to SwRstDisable (0), SyncReset (1), Disable (2h), or Enable (3h). Note: You may set transitions in multiple NEXT bits in MDCTLn in this step. Transitions do not actually take place until you set the GO[0] bit in PTCMD in a later step.
3. Set the GO[0] bit in PTCMD to 1 to initiate the transition(s).
4. Wait for the GOSTAT[0] bit in PTSTAT to clear to 0. The modules are safely in the new states only after the GOSTAT[0] bit in PTSTAT is cleared to 0.

I have written a small test program for a DM6437 that checks the MDSTAT[n] STATE doesn't change until I set the GO[0] bit in PTCMD. When I insert a delay of 100000 all of my tests fail. Without the delay only CSL_PSC_I2C fails.

Is the documentation wrong or am I missing something?

Chris

#include <stdio.h>
#include <soc.h>
#include <cslr_psc.h>

CSL_PscRegsOvly     CslRegPsc       = (CSL_PscRegsOvly)CSL_PSC_0_REGS;

#define ASSERT( c ) if ( !(c) ) do{  printf( "ASSERT %s::%d %s\n", __FILE__, __LINE__, #c); }while(0)


void HAL_SysSetNextStateToEnable( int Mod )
{
    volatile int i;
    printf("Enabling %d\n", Mod);
    while ( CSL_FEXT( CslRegPsc->PTSTAT,  PSC_PTSTAT_GOSTAT0 ) == CSL_PSC_PTSTAT_GOSTAT0_IN_PROGRESS )
    {
        //1 Wait for the GOSTAT[0] bit in PTSTAT to clear to 0. You must wait for any previously initiated
        //transitions to finish before initiating a new transition
    }

    // 2 Set the NEXT bit in MDCTLn to SwRstDisable (0), SyncReset (1), Disable (2h), or Enable (3h).
    // You may set transitions in multiple NEXT bits in MDCTLn in this step. Transitions do not
    // actually take place until you set the GO[0] bit in PTCMD in a later step.
    CslRegPsc->MDCTL[Mod] = CSL_FMKT( PSC_MDCTL_NEXT, ENABLE ) | CSL_FMKT( PSC_MDCTL_LRST, DEASSERT );

    //just check to make sure it hasn't already changed...
    for ( i = 0; i < 100000; ) { i++; }
    ASSERT( CSL_FEXT( CslRegPsc->MDSTAT[Mod],    PSC_MDSTAT_STATE ) != CSL_PSC_MDSTAT_STATE_ENABLE );

    // 3 Set the GO[0] bit in PTCMD to 1 to initiate the transition(s).
    CslRegPsc->PTCMD = CSL_FMKT(  PSC_PTCMD_GO0, SET );

    while ( CSL_FEXT( CslRegPsc->PTSTAT,  PSC_PTSTAT_GOSTAT0 ) == CSL_PSC_PTSTAT_GOSTAT0_IN_PROGRESS )
    {
        //4 Wait for the GOSTAT[0] bit in PTSTAT to clear to 0. The modules are safely in the new states only
        //after the GOSTAT[0] bit in PTSTAT is cleared to 0
    }

    //Check we are now in the correct state.
    ASSERT( CSL_FEXT( CslRegPsc->MDSTAT[Mod], PSC_MDSTAT_STATE ) == CSL_PSC_MDSTAT_STATE_ENABLE );

}

void main( void )
{
    HAL_SysSetNextStateToEnable(CSL_PSC_TIMER0);
    HAL_SysSetNextStateToEnable(CSL_PSC_TIMER1);
    HAL_SysSetNextStateToEnable(CSL_PSC_I2C);
    HAL_SysSetNextStateToEnable(CSL_PSC_GPIO);
    HAL_SysSetNextStateToEnable(CSL_PSC_PWM0);
    HAL_SysSetNextStateToEnable(CSL_PSC_PWM1);
    HAL_SysSetNextStateToEnable(CSL_PSC_TPCC);
    HAL_SysSetNextStateToEnable(CSL_PSC_TPTC0);
    HAL_SysSetNextStateToEnable(CSL_PSC_TPTC1);
    HAL_SysSetNextStateToEnable(CSL_PSC_TPTC2);
    HAL_SysSetNextStateToEnable(CSL_PSC_EMAC_WR);
    //HAL_SysSetNextStateToEnable(CSL_PSC_MCASP0);
    HAL_SysSetNextStateToEnable(CSL_PSC_MCBSP0);
    HAL_SysSetNextStateToEnable(CSL_PSC_MCBSP1);
}