questions about EMIF

Shuai

A single EMIF interface can support maximum of two loads. You may have to do some timing analysis to verify all AC timings are met. However, from board design and data throughput perspective, it is actually better to use both EMIFA and EMIFB interface. You can connect the SRAM to the EMIFA interface, and SDRAM to the EMIFB interface.

Thanks

David

Hi:

I see,thank you very much!

Han Shuai

Hi:

I'm a little confused about the meaning of"A single EMIF interface can support maximum of two loads." Don't a single EMIF interface has 4 CEs, and every CE can support a load? So should the maximum of loads be four?

Besides I have another question.SRAM and SDRAM are all synchronious,if a single EMIF interface can support a synchronious device and a asynchronious device simultaneously?

Thanks!

Han Shuai

EMIFA supports SDRAM up to 100 MHz with up to two SDRAM or asynchronous memory loads. Additional loads will limit the operation to lower speeds and the maximum speed should be confirmed by board simulation using IBIS models. For EMIFB, it can support two loads up to 133MHz.

The EMIF interface can support both synchronous and asynchronous device simultaneously.

Thanks

David