only 2~4 frames per second
uyvy format, whether it is 480 * 480 or 720 * 480, both very slow
I use dvsdk v4.03.00.06
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
only 2~4 frames per second
uyvy format, whether it is 480 * 480 or 720 * 480, both very slow
I use dvsdk v4.03.00.06
//Here is part of my code:
char outBuf[1024*1024];
char outBuf2[1024*1024];
int bytes;
typedef struct ss
{
char outBuf[1024*1024];
}ss;
ss aa[10];
void *EncProc(void *pVoid)
{
InitCE();
int i;
static int n=0;
int bytes,bytes2=0;
sleep(2);
printf("start EncProc\n");
while (1)
{
int i = (n++%10);
bytes = Encode(aa[i].outBuf, 720*480*2, outBuf2,1024*1024);
if (bytes>0)
{
//bytes2 = Decode(outBuf2,bytes,outBuf,1024*1024);
printf("Encode:%d,Decode %d\n",bytes,bytes2);
}
else
printf("Encode Error!\n");
}
return NULL;
}
//this is my codec server config
var dataSection = "DDR2";
var udataSection = "DDR2";
var codeSection = "DDR2";
/*
* "Use" the various codec modules; i.e., implementation of codecs.
* All these "xdc.useModule" commands provide a handle to the codecs,
* which we'll use to initialize config params and add the codecs to
* the Server.algs array.
*/
var C6ACCEL = xdc.useModule('ti.c6accel.ce.C6ACCEL');
C6ACCEL.serverFxns = "UNIVERSAL_SKEL";
C6ACCEL.stubFxns = "UNIVERSAL_STUBS";
C6ACCEL.useCache = false;
C6ACCEL.alg.watermark = false;
C6ACCEL.alg.codeSection = codeSection;
C6ACCEL.alg.udataSection = udataSection;
C6ACCEL.alg.dataSection = dataSection;
var AACHEDEC = xdc.useModule('ti.sdo.codecs.aachedec.ce.AACHEDEC');
AACHEDEC.serverFxns = "AUDDEC1_SKEL";
AACHEDEC.stubFxns = "AUDDEC1_STUBS";
AACHEDEC.useCache = false;
AACHEDEC.alg.watermark = false;
AACHEDEC.alg.codeSection = codeSection;
AACHEDEC.alg.udataSection = udataSection;
AACHEDEC.alg.dataSection = dataSection;
var I2P = xdc.useModule('ti.sdo.codecs.deinterlacer.ce.I2P');
I2P.serverFxns = "UNIVERSAL_SKEL";
I2P.stubFxns = "UNIVERSAL_STUBS";
I2P.useCache = false;
I2P.alg.watermark = false;
I2P.alg.codeSection = codeSection;
I2P.alg.udataSection = udataSection;
I2P.alg.dataSection = dataSection;
var G711DEC = xdc.useModule('ti.sdo.codecs.g711dec.ce.G711DEC');
G711DEC.serverFxns = "SPHDEC1_SKEL";
G711DEC.stubFxns = "SPHDEC1_STUBS";
G711DEC.useCache = false;
G711DEC.alg.watermark = false;
G711DEC.alg.codeSection = codeSection;
G711DEC.alg.udataSection = udataSection;
G711DEC.alg.dataSection = dataSection;
var G711ENC = xdc.useModule('ti.sdo.codecs.g711enc.ce.G711ENC');
G711ENC.serverFxns = "SPHENC1_SKEL";
G711ENC.stubFxns = "SPHENC1_STUBS";
G711ENC.useCache = false;
G711ENC.alg.watermark = false;
G711ENC.alg.codeSection = codeSection;
G711ENC.alg.udataSection = udataSection;
G711ENC.alg.dataSection = dataSection;
var H264DEC = xdc.useModule('ti.sdo.codecs.h264dec.ce.H264DEC');
H264DEC.serverFxns = "VIDDEC2_SKEL";
H264DEC.useCache = false;
H264DEC.manageOutBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
H264DEC.stubFxns = "VIDDEC2_STUBS";
H264DEC.manageInBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
H264DEC.alg.evaluation = false;
H264DEC.alg.codeSection = codeSection;
H264DEC.alg.udataSection = udataSection;
H264DEC.alg.dataSection = dataSection;
H264DEC.alg.overlays = true;
H264DEC.alg.dynamicCodeLoadSection = codeSection;
H264DEC.alg.dynamicCodeRunSection = "L1PSRAM";
var H264ENC = xdc.useModule('ti.sdo.codecs.h264enc.ce.H264ENC');
H264ENC.serverFxns = "VIDENC1_SKEL";
H264ENC.useCache = false;
H264ENC.manageOutBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
H264ENC.stubFxns = "VIDENC1_STUBS";
H264ENC.manageInBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
H264ENC.alg.evaluation = false;
H264ENC.alg.codeSection = codeSection;
H264ENC.alg.udataSection = udataSection;
H264ENC.alg.dataSection = dataSection;
H264ENC.alg.overlays = true;
H264ENC.alg.dynamicCodeLoadSection = undefined;
H264ENC.alg.dynamicCodeRunSection = undefined;
var JPEGDEC = xdc.useModule('ti.sdo.codecs.jpegdec.ce.JPEGDEC');
JPEGDEC.serverFxns = "IMGDEC1_SKEL";
JPEGDEC.useCache = false;
JPEGDEC.manageOutBufsCache = [true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true];
JPEGDEC.stubFxns = "IMGDEC1_STUBS";
JPEGDEC.manageInBufsCache = [true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true];
JPEGDEC.alg.watermark = false;
JPEGDEC.alg.codeSection = codeSection;
JPEGDEC.alg.udataSection = udataSection;
JPEGDEC.alg.dataSection = dataSection;
var JPEGENC = xdc.useModule('ti.sdo.codecs.jpegenc.ce.JPEGENC');
JPEGENC.serverFxns = "IMGENC1_SKEL";
JPEGENC.useCache = false;
JPEGENC.manageOutBufsCache = [true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true];
JPEGENC.stubFxns = "IMGENC1_STUBS";
JPEGENC.manageInBufsCache = [true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true];
JPEGENC.alg.watermark = false;
JPEGENC.alg.codeSection = codeSection;
JPEGENC.alg.udataSection = udataSection;
JPEGENC.alg.dataSection = dataSection;
var MPEG2DEC = xdc.useModule('ti.sdo.codecs.mpeg2dec.ce.MPEG2DEC');
MPEG2DEC.serverFxns = "VIDDEC2_SKEL";
MPEG2DEC.useCache = false;
MPEG2DEC.manageOutBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
MPEG2DEC.stubFxns = "VIDDEC2_STUBS";
MPEG2DEC.manageInBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
MPEG2DEC.alg.evaluation = false;
MPEG2DEC.alg.codeSection = codeSection;
MPEG2DEC.alg.udataSection = udataSection;
MPEG2DEC.alg.dataSection = dataSection;
MPEG2DEC.alg.overlays = true;
MPEG2DEC.alg.dynamicCodeLoadSection = codeSection;
MPEG2DEC.alg.dynamicCodeRunSection = "L1PSRAM";
var MPEG4DEC = xdc.useModule('ti.sdo.codecs.mpeg4dec.ce.MPEG4DEC');
MPEG4DEC.serverFxns = "VIDDEC2_SKEL";
MPEG4DEC.useCache = false;
MPEG4DEC.manageOutBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
MPEG4DEC.stubFxns = "VIDDEC2_STUBS";
MPEG4DEC.manageInBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
MPEG4DEC.alg.evaluation = false;
MPEG4DEC.alg.codeSection = codeSection;
MPEG4DEC.alg.udataSection = udataSection;
MPEG4DEC.alg.dataSection = dataSection;
MPEG4DEC.alg.overlays = true;
MPEG4DEC.alg.dynamicCodeLoadSection = codeSection;
MPEG4DEC.alg.dynamicCodeRunSection = "L1PSRAM";
var MPEG4ENC = xdc.useModule('ti.sdo.codecs.mpeg4enc.ce.MPEG4ENC');
MPEG4ENC.serverFxns = "VIDENC1_SKEL";
MPEG4ENC.useCache = false;
MPEG4ENC.manageOutBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
MPEG4ENC.stubFxns = "VIDENC1_STUBS";
MPEG4ENC.manageInBufsCache = [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false];
MPEG4ENC.alg.evaluation = false;
MPEG4ENC.alg.codeSection = codeSection;
MPEG4ENC.alg.udataSection = udataSection;
MPEG4ENC.alg.dataSection = dataSection;
MPEG4ENC.alg.overlays = true;
MPEG4ENC.alg.dynamicCodeLoadSection = undefined;
MPEG4ENC.alg.dynamicCodeRunSection = undefined;
/*
* The array of algorithms this server can serve up. This array also
* configures details about the threads which will be created to run the
* algorithms (e.g. stack sizes, priorities, etc.).
*/
Server.algs = [
{name: "c6accel", mod: C6ACCEL , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 3},
groupId : 2,
},
{name: "aachedec", mod: AACHEDEC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 3},
groupId : 2,
},
{name: "i2p", mod: I2P , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 1},
groupId : 0,
},
{name: "g711dec", mod: G711DEC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 3},
groupId : 2,
},
{name: "g711enc", mod: G711ENC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 3},
groupId : 2,
},
{name: "h264dec", mod: H264DEC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 1},
groupId : 0,
},
{name: "h264enc", mod: H264ENC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 1},
groupId : 0,
},
{name: "jpegdec", mod: JPEGDEC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 2},
groupId : 1,
},
{name: "jpegenc", mod: JPEGENC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 2},
groupId : 1,
},
{name: "mpeg2dec", mod: MPEG2DEC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 1},
groupId : 0,
},
{name: "mpeg4dec", mod: MPEG4DEC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 1},
groupId : 0,
},
{name: "mpeg4enc", mod: MPEG4ENC , threadAttrs: {
stackMemId: 0, priority: Server.MINPRI + 1},
groupId : 0,
},
];
//here is my server.tci and server.tcf
//server.tci
var mem_ext = [
{
comment: "DDRALGHEAP: off-chip memory for dynamic algmem allocation",
name: "DDRALGHEAP",
base: 0x94000000, //256M+32
len: 0x02000000, // 32 MB
space: "code/data"
},
{
comment: "DDR2: off-chip memory for application code and data",
name: "DDR2",
base: 0x96000000, //256+128
len: 0x02000000, // 32 MB
space: "code/data"
},
{
comment: "DSPLINK: off-chip memory reserved for DSPLINK code and data",
name: "DSPLINKMEM",
base: 0x98000000, //256+128+32
len: 0x00100000, // 1 MB
space: "code/data"
},
{
comment: "RESET_VECTOR: off-chip memory for the reset vector table",
name: "RESET_VECTOR",
base: 0x98100000, //448M
len: 0x00001000, // 4 KB
space: "code/data"
},
{
comment: "L4CORE: L4-Core Interconnect Address Space",
name: "L4CORE",
base: 0x48000000,
len: 0x01000000, // 16 MB
space: "data"
},
{
comment: "L4PER: L4-Peripheral Interconnect Address Space",
name: "L4PER",
base: 0x49000000,
len: 0x00100000, // 1 MB
space: "data"
},
];
//server.tcf
var platform = environment["config.platform"];
print("platform = " + platform);
utils.importFile('./memmap.tci');
/*
* Setup platform-specific memory map:
*/
var device_regs = {
l1PMode: "16k",
l1DMode: "16k",
l2Mode: "64k",
l1DHeapSize: 0 //xC000
};
var params = {
//clockRate: 360,
clockRate: 800.0,
catalogName: "ti.catalog.c6000",
deviceName: "3530",
regs: device_regs,
mem: mem_ext
};
/*
* Now customize the generic platform with parameters specified above.
*/
utils.loadPlatform("ti.platforms.generic", params);
/* ===========================================================================
* Enable heaps and tasks
* ===========================================================================
*/
bios.enableMemoryHeaps(prog);
bios.enableTskManager(prog);
/* ===========================================================================
* Create heaps in memory segments that are to have heap
* ===========================================================================
*/
bios.DDR2.createHeap = true;
bios.DDR2.heapSize = 0x20000; // 128K
bios.DDRALGHEAP.createHeap = true;
bios.DDRALGHEAP.heapSize = bios.DDRALGHEAP.len;
/* RAMS */
bios.L1DSRAM.createHeap = true;
bios.L1DSRAM.enableHeapLabel = true;
bios.L1DSRAM["heapLabel"] = prog.extern("L1DHEAP");
bios.L1DSRAM.heapSize = bios.L1DSRAM.len;
/* Enable power management, whilst ensuring DSP CPU load reporting accuracy */
bios.PWRM.ENABLE = true;
bios.PWRM.IDLECPU = true;
bios.PWRM.LOADENABLE = true;
bios.PWRM.USECLKPRD = true;
bios.PWRM.NUMSLOTS = 10 + 1;
bios.PWRM.CLKTICKSPERSLOT = 50;
if (platform == "ti.platforms.evm3530") {
bios.L1DSRAM.heapSize = 0x10000; // use 64k of L1DSRAM for heap
}
/* ===========================================================================
* GBL
* ===========================================================================
*/
/* set MAR register to cache external memory 0x80000000-0x8FFFFFFF */
prog.module("GBL").C64PLUSCONFIGURE = true ;
prog.module("GBL").C64PLUSMAR128to159 = 0x0000ffff;
prog.module("GBL").ENABLEALLTRC = false;
prog.module("GBL").PROCID = 0;
/* ===========================================================================
* MEM
* ===========================================================================
*/
prog.module("MEM").STACKSIZE = 0x1000 ;
prog.module("TSK").STACKSIZE = 0x1000 ;
/* ===========================================================================
* Global Settings
* ===========================================================================
*/
prog.module("MEM").ARGSSIZE = 256;
/* ===========================================================================
* Enable MSGQ and POOL Managers
* ===========================================================================
*/
bios.MSGQ.ENABLEMSGQ = true;
bios.POOL.ENABLEPOOL = true;
/* ===========================================================================
* Set all code and data sections to use DDR2
* ===========================================================================
*/
bios.setMemCodeSections (prog, bios.DDR2);
bios.setMemDataNoHeapSections (prog, bios.DDR2);
bios.setMemDataHeapSections (prog, bios.DDR2);
/* ===========================================================================
* MEM : Global
* ===========================================================================
*/
prog.module("MEM").BIOSOBJSEG = bios.DDR2;
//prog.module("MEM").MALLOCSEG = bios.DDR2;
prog.module("MEM").MALLOCSEG = bios.DDRALGHEAP;
/* ===========================================================================
* TSK : Global
* ===========================================================================
*/
prog.module("TSK").STACKSEG = bios.DDR2;
bios.TSK.instance("TSK_idle").stackSize = 0x1000;
/* ===========================================================================
* Generate configuration files...
* ===========================================================================
*/
if (config.hasReportedError == false) {
prog.gen();
}
/*
* @(#) ti.sdo.ce.examples.servers.all_codecs; 1,0,0,80; 11-20-2007 13:27:33; /db/atree/library/trees/ce-i01x/src/
*/
/*
* @(#) ti.sdo.ce.wizards.genserver; 1, 0, 0,23; 6-3-2009 02:32:53; /db/atree/library/trees/ce/ce-n07x/src/
*/