Hi,
I'm using AM335x with PSP04.08.00.07 (Arago). How to write a code of FIQ interrupt request and FIQ handler for GPIO input in kernel space ?
Any simple example or tutorial link i can refer?
Thanks and Regards
keldy
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Keldy,
It might not be possible to access kernel data structures in FIQ mode. This will create some overhead. You won't be able use FIQ the same ways as you use IRQ.
Why do you need to use FIQ? How many interrupts are you expecting and what is the expected turn around time?
Hi,
i want a fast response of interrupt, after detecting a rising edge of input logic high signal (GPIO), i need to output logic low to a GPIO pin. The time between rising edge of input and falling edge of output must be within 150ns, and the time of rising edge of input until next rising edge of input is 4.8us. that mean i need to toggle my output pin every 4.8us.
Is it the IRQ possible to do that?
Thanks and Regards
Keldy
Keldy,
You wont be able to achieve this latency using IRQ. FIQ is what is required. But there will be another problem, if you've to toggle the output logic within 150ns, it will be real tough to achieve that.
Can you try a simple call to toggle a GPIO and observe the best latency you can achieve?
Keldy,
Sorry, I didnt see your other post related to GPIO toggle. Looks like if that is not possible, how are you going to achieve 150ns interrupt latency?
Hi,
The continuous toggle speed of a GPIO is 270ns.
i not gonna to toggle a GPIO output in 150ns, i just need to toggle a GPIO output in 150ns after a rising edge of a GPIO input. From scope, i saw my GPIO output only will toggle after 500ns, after a rising edge of a GPIO input.
Thanks and Regards
Keldy
Keldy,
To enable FIQ you have to write a small handler function and pass on the function pointer and length to the function set_fiq_handler(). This will replace the FIQ vector at the offset 0xffff_001c in the exception vector table. Also you have to enable FIQ in Interrupt controller registers for the GPIO bank that you are using. Then you've to enable FIQ in CPSR register. This can be done using the function enable_fiq()
Hi,
Any simple example of FIQ that i can refer ?
By the way, i discover that i need more time in detecting a input signal, around 450ns, is there a way to increase the detecting input time?
how to read certain bit of register instead of read the whole register?
Thanks and Regards
Keldy
All,
please read this thread before digging deeper into FIQ usage: http://e2e.ti.com/support/dsp/sitara_arm174_microprocessors/f/791/t/212173.aspx
Basically you can't use FIQ as it is reserved for secure devices.
Regards.
Keldy,
In my 2.6.37 code base the file arch/arm/mach-rpc/dma.c has fiq implementation.
You are reading a GPIO register and then writing it. So there are at least two read/write operations performed on GPIO registers. Each of them might be taking a good amount of time, which is reflecting clearly.
i got error message "linux/linkage.h no such file and directory" when compiling the fig.c and fiq.S file, my Makefile is as following:
Keldy,
Why are you compiling this as a separate module. You can make this as part of your kernel build itself. Check for the Makefile/Kconfig files and include the files in your kernel build by adding required configs in your .config file using menuconfig, if required.
Keldy,
I'm not really sure about how modular the code is to make it as kernel module and insert it. Instead, the simplest way is to build the kernel by following the instructions below.
http://processors.wiki.ti.com/index.php/AM335x_PSP_User's_Guide
http://processors.wiki.ti.com/index.php/AMSDK_Linux_User%27s_Guide
Hi,
Here my code for fiq kernel module (fiq-example.c):
Any advise to my code ?
I have problem in writing the assembly code, i just refer the disassemble file to write, but i feel very weird of my assembly code. in my assembly code, i want to set bit 24th in register GPIO_CLEARDATAOUT of GPIO1. Any correction that i need to do?
For my FIQ kernel module, what else i have miss for initialize the FIQ interrupt ?
Thanks and Regards
Keldy
Keldy,
I don't think your assembly code is proper. You are not specifying the value to be written to the GPIO_CLEARDATAOUT anywhere. Also, you are not doing any return from FIQ routine. You should write a "MOVS PC,R14" to switch back to the previous mode of execution.
Keldy,
Whatever value you want to write, you do a mov to any of the FIQ banked register.
e.g. "mov r9, #2" where value 2 will be written to r9.
Or else an efficient way will be:
regs.ARM_r10 = (GPIO1_BASE + GPIO_CLEARDATAOUT);
regs.ARM_r9 = 0xvalue; // Value you want to write
And change the assembly like this.
Keldy,
If you open arch/arm/kernel/Makefile you'll see the line like this.
obj-$(CONFIG_FIQ) += fiq.o
This means that you should have "CONFIG_FIQ=y" line inside your .config file for present in the "board-support/linux-04.06.00.07" directory.
If this is present it will compile fiq.c. Similarly if you want to add your custom handler you've to add an entry in your Makefile and Kconfig file, to do it in a proper manner. Then you've to include the corresponding macro in the .config file. Since .config file is a generated file while running the defconfig or menuconfig step, it will be better you add it inside your defconfig file later.
Please refer to kernel build structure related documentation. You'll be able to understand better.
http://free-electrons.com/doc/training/linux-kernel/slides.pdf
Hi,
in "board-support/linux-04-06.00.07/arch/arm/kernel", the Makefile have something like
obj-$(CONFIG_FIQ) += fiq.o fiqasm.o
do i need to remove the "fiqasm.o" ?
and in "board-support/linux-04-06.00.07/arch/arm/configs", the "am335x_evm_defconfig" file, i cant found the "CONFIG_FIQ"
Thanks and Regards
Keldy
Keldy,
For time being you can modify the fiqasm.S file with your code and change the required function names.
You've to add CONFIG_FIQ=y in your defconfig file and make sure that it is present in the .config file generated and also double check the fiq.c and fiqasm.S is also getting compiled.