This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Using Starterware with Nor Xip



I was trying to find an example in Starterware that shows how to setup/enable use of L2.  The use case for enabling is for an applicaitons executing code from NOR XIP.

The below code is apparentely not sufficient (has not been demonstrated to work.)

//Disable L2 cache

MRC     P15, 0, r1, C1, C0, 1

BIC r1, r1, #0x2

MCR P15, 0 , r1, C1, C0, 1 

//Set L2EN bit

MRC     P15, 0, r1, C1, C0, 0

ORR r1,r1, #0x2

MCR P15, 0 , r1, C1, C0, 0

//set C bit

MRC     P15, 0, r1, C1, C0, 1

ORR r1,r1, #0x4

MCR P15, 0 , r1, C1, C0, 1

Thanks,

  • Hi Dave,

    There are no examples which demonstrate only L2 enabling. However, the function CacheEnable() defined in system_config/armv7a/cache.c enables both L1 and L2 as required. The usage is demonstrated in examples/evmAM335x/cache_mmu/uartEdma_Cache.c.

    Regards,

    Sujith.