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U-Boot memory model



I wasn't sure where the right place to ask this was so if anyone can point me to a more appropriate forum I would appreciate it.

My question is about the way memory works in U-Boot.

On the DM814x devices, when booting from NAND flash, there are two stages of U-Boot involved. The first stage loads the second stage into memory address 0x8100000 and executes from there. By the time the user prompt is presented for the second stage U-Boot, we can overwrite the memory at address 0x81000000 again without affecting U-Boot. I assume that means U-Boot relocated itself somewhere else? Where and how does this mechanism work?

I'm also curious about the malloc() call provided by U-Boot. Where is the memory region used to allocate space and how big is it? Where can I find the definitions for this stuff?

Thanks for any pointers.

  • Przemyslaw,

    Good question. 

    I can explain my understanding. 

    1. The first stage u-boot is loaded by the BOOTROM to internal OCMC-SRAM located the address 0x4030_0000 and jump to the start address mentioned in the header of the u-boot. 

    2. The first stage u-boot runs first from OCMC and initializes clocks and DDR and then relocates itself to DDR and run from there. This relocation is optional, and in fact you can make the first stage run from OCMC completely. 

    3. The it loads the second stage u-boot to RAM again and jumps to the start location and run. 

    4. Since the startup code is position independent code, it can run from any offset in the beginning. So, if the current location is different from the linked address, it will then relocate itself to the address where the code is linked to. You can check the address where it runs from, by checking the u-boot.map file generated. 

    5. You can get the info about the MALLOC area size etc, from the u-boot config file. Alternatively, you can check the area from which the memory is allocated by printing the address of a malloced location, by writing a small test code inside u-boot.

    I hope I could clarify your queries properly :)

  • Thanks that was quite useful. With your suggestions I also figured out that on ARM the malloc() region starts at: _armboot_start - CONFIG_SYS_MALLOC_LEN

    Thanks again! 

  • Hi, Renjith,

    I notice this from your post:

    ----------------------------------------

    2. The first stage u-boot runs first from OCMC and initializes clocks and DDR and then relocates itself to DDR and run from there. This relocation is optional, and in fact you can make the first stage run from OCMC completely. 

    ----------------------------------

    Currently, I am working on to bring up our custom dm8148 board. I want to build a u-boot-min to run at OCMC-SRAM and don't init DDR3 and relocate itself to DDR. 

    Could you advise how to do it? Thanks in advance for your help!

    Regards,

    Shunnian

  • Shunnain,

    You'll have to check the start up code. As far as I remember it is in lowlevel_init.S file. This might change according to different u-boot releases.

  • Hi, Renjith,

    Thanks, I have resolved my issue.

    Regards,

    Shunnian

  • hi Renjith,

    I meet a problem.

     

    dm8148 boot stop at 2nd stage, the following is the uart printing info

     

    U-Boot 2010.06 (Feb 27 2013 - 14:20:37) DM8127_IPNC_3.20.00

    TI8148-GP rev 2.1

    ARM clk: 600MHz
    DDR clk: 400MHz
    L3 clk: 200MHz
    IVA clk: 450MHz
    ISS clk: 400MHz
    DSP Default OFF
    DSS Default OFF

    DRAM:  1 GiB
    NAND:  HW ECC BCH8 Selected
    256 MiB
    Using default environment

    The 2nd stage U-Boot will now be auto-loaded
    Please do not interrupt the countdown till TI8148_EVM prompt if 2nd stage is already flashed
    Hit any key to stop autoboot:  0

    NAND read: device 0 offset 0x20000, size 0x40000
     262144 bytes read: OK
    ## Starting application at 0x81000000 ...

     

    Is there something that i miss to config?

    Even when i load the second uboot through uart, the problem still exist.

    Any suggestion would be appreciated.

    ps: customboard

     

  • John,

    Basically the NAND offset ox20000 should contain second stage u-boot image, which is missing/incomplete or corrupt. Please check whether this is in place.