Hi,
I am working on a board based on OMAP4460.
I use a 2GB/16Gb nand flash for booting.
Information on NAND
Part : MT29F16G16ADBCA
Device width : 16-bit
Page size : 2048 Words (4096 bytes)
Spare/oob area per page : 112 Words (224 bytes)
Page per block : 64
No of blocks : 8192
From the OMAP4460 TRM Revision V section "27.4.7.4.2 Read Sector Procedure", I have come
to know that the default ECC correction applied by ROM code is BCH 8b/sector(512 bytes)
using the GPMC and ELM hardware.
Hence i have planned to use the BCH 8-bit HW ECC throughout x-loader, u-boot and linux kernel.
And as per the ECC mapping in the spare/oob area described in same section its
2bytes reserved for block state(at start of oob) + (13 byte ecc + 1 byte padding) per sector.
could anybody tell me if the below ecc layout for my NAND is correct ?
.eccbytes = 104,
/*1 2 3 4 5 6 7 8 9 10 11 12 13*/
.eccpos = { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, /* sector 1 */
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, /* sector 2 */
30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, /* sector 3 */
44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, /* sector 4 */
58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, /* sector 5 */
72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, /* sector 6 */
86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, /* sector 7 */
100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112 } /* sector 8 */
Also please point me to any other things that i need to take care.
Regards,
Murali