BIOS PSP Version
01.30.00.05
I have a small application which uses the BIOS PSP SATA driver to measure I/O performance using a Western Digital 1 TB HDD, which can achieve approximately 124 MB/s of sustained performance between the drive and a host, according to the specification. In using the SATA driver within my application to perform reads of 128 KB per read, I am only seeing around 12 MB/s of read performance. I am using _itoll (TSCH, TSCL) calls around my read loop to measure the number of cycles to complete a read of 100 MB total. It's measuring 3,684,961,345 cycles to complete the 100 MB read with a 456 MHz clock rate (comes out to about 8 seconds, and around 12 MB/s throughput).
I have my read buffer mapped to internal SRAM (L2), and L2 is configured such that 32 KB is surrendered as cache space (the remaining 224 KB of the 256 KB SRAM area is being claimed by my application). My external memory region where my code is run from is being made cacheable through the appropriate MAR register, although I'm not sure that caching of my code is doing much good since the driver has several layers to it (ATA/ATAPI driver, AHCI driver, block media driver), and jumps all over the place through several function calls to perform a read.
Is this kind of performance expected? The datasheet for the BIOS PSP claims around 120 MB/s of read performance (I understand the HDD used in the measure was different). If my performance is unexpected, do you have any suggestions as to how to improve it? Any ideas of where to look or what I might be doing wrong?
