Qestion about intc on 6657

xiang_li

Hi all,

I want to use interrupt, but i wouldn`t use BIOS and RTSC.

In csl_intc.h, give us a example:

* @b Example:
* @verbatim

CSL_IntcObj intcObj20;
CSL_IntcGlobalEnableState state;
CSL_IntcContext context;
CSL_Status intStat;
CSL_IntcParam vectId;

context.numEvtEntries = 0;
context.eventhandlerRecord = NULL;
// Init Module
CSL_intcInit(&context);

// NMI Enable
CSL_intcGlobalNmiEnable();

// Enable Global Interrupts
intStat = CSL_intcGlobalEnable(&state);

// Opening a handle for the Event 20 at vector id 4

vectId = CSL_INTC_VECTID_4;
hIntc20 = CSL_intcOpen (&intcObj20, CSL_INTC_EVENTID_20, &vectId , NULL);

// Close handle
CSL_IntcClose(hIntc20);
@endverbatim

My qestion:

If i use the example, it seems only map 128 system events to 12 CPUINT,

But I have to use #156 system interrupt.

I understand if I want to use #156 system interrupt. I must to do like this:

system interrupt--->host interrupt--->hwi

(1)If i would`t use RTSC and BIOS, Can i use cpintc?

(2)if i can`t use cpintc, How to map system interrupt to host interrupt.

(3)if Ti give a example or modify the code,Thank you very much.

Best Regards,

over 12 years ago

0 xiang_li over 12 years ago

Intellectual 935 points

Hi all,

I have another qestion:

If I use bios

my code like this:

int eventId = 0;
Hwi_Params params;
CpIntc_mapSysIntToHostInt(0, 156, 32);
CpIntc_dispatchPlug(156, &RecvISR, 156, TRUE);
CpIntc_enableHostInt(0,32);
eventId = CpIntc_getEventId(32);
Hwi_Params_init(&params);
params.arg = 32;
params.eventId = eventId;
params.enableInt = TRUE;
Hwi_create(4, &CpIntc_dispatch, &params, NULL);
Hwi_enable();
Hwi_enableInterrupt(4);

is right?

And i add many xdc.module in my .cfg

But i can`t in ISR... and eventId always is 0xFFFF :(

Thanks,

0 Steven Ji over 12 years ago

TI__Genius 12065 points

Li,

1. You can use CPINTC or chip level interrupt controller (CIC) for mapping the other secondary system interrupts to CPU.

2. Either BIOS or CSL or directly program interrupt controller registers should be used to configure interrupt controller.

3. Please take a look at the CSL example for cpintc (CIC) and CPU intc in C6678 PDK folder. It should apply to C6657 as well, although the CIC and event number will be changed based on the device data manual.

C:\ti\pdk_C6678_1_1_1_4\packages\ti\csl\example\cpintc\cpintc_test.c

And there is one wiki page discussed about the interrupt in KeyStone device. It might be helpful for you.

http://ap-fpdsp-swapps.dal.design.ti.com/index.php/Configuring_Interrupts_on_Keystone_Devices

0 xiang_li over 12 years ago in reply to Steven Ji

Intellectual 935 points

Hi steven,

I have three question:

(1)I use same host id to get GEM id by API, on 6657 and 6678.But I found the GEM id is different.Why?

I think 66xx GEM id which mapped with host id should be fixed.

(2)If I use Cpintc API, I must map ISR to Hwi before BIOS_start(); and have to use idle task.

If i did`t write BIOS_start(),though system interrupt in main() Fnx.But I can`t inside ISR.

I said that is right?

Thanks,

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Qestion about intc on 6657