• State Resolved
  • Locked Locked
  • Replies 8 replies
  • Subscribers 101 subscribers
  • Views 2196 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DM8168 DSP to GPMC Access?

Jaden Ghylin102047
Expert 1140 points
Other Parts Discussed in Thread: TMS320DM8168

Is the DSP in the DM8168 able to access the GPMC directly?  If not, what is the method for accessing the GPMC from the DSP?

-Jaden

  • 0
    TI__Genius 13235 points

    Hi Jaden,

    I'm looking into this question for you. I'll have some feedback shortly.

    Thanks,

    Clinton

  • 0 in reply to Clinton Rodgers
    TI__Genius 13235 points

    Jaden,

    I found the following information in the DM8168 datasheet. This datasheet can be found at the link below.

    DM8168 datasheet: http://www.ti.com/lit/gpn/tms320dm8168

    The DSP can access the GPMC throught the system interconnect (L3). This is visualized in the system functional diagram (figure 1-1, pg.5) and the interconnect overview (figure 5-1, pg.132). The L3 memory map can be found in table 2-26 (pg. 27). I have included screen shots of figure 5-1 and table 2-26 below for your reference.

    Figure 5-1: Interconnect Overview

    Table 2-26: L3 Memory Map

     

    More information can be found on the DSP and GPMC in the TRM as well. The DSP information can be found in section 1.3 (pg.123). Information on the GPMC can be found in section 9 (pg. 852). The TRM can be found at the following link.

    DM8168 TRM: http://www.ti.com/lit/ug/sprugx8/sprugx8.pdf

    Let me know if you need anything clarified.

    Thanks,

    Clinton

  • 0 in reply to Clinton Rodgers
    TI__Genius 13235 points

    Jaden,

    I wanted to let you know I'm continuing to look into this topic. I'm confirming whether or not the L3 interconnect truly has a connection between the DSP subsystem and the GPMC. This thread will be updated with any relevant feedback. If you have any related questions in the meantime, feel free to post.

    Thanks,

    Clinton

  • 0 in reply to Clinton Rodgers
    Prodigy 10 points

    Clinton,

    In the tms320dm8168.pdf file, Table 5-1, L3 Master-and-Slave Connectivity, captures the master and slave connectivity on the DM8168 L3 interconnect bus.  The table references a C674x MDMA master and a C674x CFG master and it indicates that neither C674x master is connected to the GPMC slave.  We are interested in the DM8168 DSP/GPMC connectivity as well.  It appears that to achieve DSP to GPMC connectivity on the DM8168 processor one must use the EDMA to provide the access.  Any additional information you can find on the DM8168 DSP/GPMC connectivity is appreciated.

    Tom

  • 0 in reply to Tom Phillips
    TI__Guru**** 170625 points

    Hi Tom,

    To access the GPMC from the C674x DSP MDMA, through the L3 interconnect, you should use the System MMU. Here are some extracts from the DM816x DataSheet:

    1.1 Features

    System Memory Management Unit (System MMU) - Maps C674x DSP and EMDA TCB Memory Accesses to System Addresses

    1.3 Description

    All C674x L3 and off-chip memory accesses are routed through a system MMU.

    2.4.2 System Memory Management Unit (System MMU)


    All C674x DSP accesses through the MDMA port are directed through the system memory management unit (System MMU) module where they are remapped to physical system addresses. This protects the ARM Cortex-A8 memory regions from accidental corruption by C674x code and allows for direct allocation of buffers in user space without the need for translation between ARM and DSP applications.

    2.10.1 L3 Memory Map
    The table represents the physical addresses used by the L3 infrastructure. Some processors within the device (such as CortexTM-A8 ARM, C674x DSP) may re-map these targets to different virtual addresses through an internal or external MMU.

    Here is a GEL file (attached) how to configure System MMU (referred as DEMMU in TRM and Errata), for your reference: 6472.ARM_system_mmu_twl.gel

    You also should check the DM816x Errata document (SPRZ329B), where we also have relevant information:

    Advisory 2.0.34 DEMMU May Hang When Used in Table-Walk Mode

    Revisions Affected: 2.0, 1.1, 1.0
    Details: When an access is made through DEMMU toward the end of a virtual page and the page (corresponding to the next incrementing virtual address range) is not resident in the TLB, the DEMMU may hang. This hang may cause the requestor (C674x or EDMA) to hang....

    DEMMU Bypass - GPMC Accessibility Limitations
    In order for the DSP to access GPMC directly, the DEMMU must be used to remap the GPMC physical address range to a different virtual address. Therefore, Workaround 1 cannot be used and also support direct DSP access to the GPMC addresses. If Workaround 1 is desired, then the DSP can access the GPMC via indirect means, such as by submitting an EDMA request to access the GPMC. Alternatively, Workaround 2 can be used.
    The reason for this limitation is that the DSP views virtual addresses between 0x0000 0000 and 0x10FF FFFF as local addresses (mapped to DSP L1D, L1P, L2, and control registers). The L3 interconnect maps a part of GPMC addresses to the same range. In order for the DSP to directly access GPMC, the DEMMU must be used to remap a chosen virtual address (say 0x2000 0000) to the GPMC physical address of 0x00000000.


    Regards,

    Pavel





  • 0 in reply to Pavel Botev
    TI__Genius 13235 points

    Pavel,

    Thanks for the insight.

     

    Jaden, Tom,

    Does this address your questions? Please post if you have any follow up questions or need anything clarified.

    Thanks,

    Clinton

  • 0 in reply to Clinton Rodgers
    TI__Genius 13235 points

    All,

    I am going to mark this thread answered. If there are any other questions or concerns, please post them.

    Thanks,

    Clinton

  • 0 in reply to Clinton Rodgers
    Prodigy 110 points

    I have read the chapter bus related, but I am still very confused, can give me an example of the memory mapping?