This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

OMAP/ARM Gel file error when running debug session on ARM/both cores

Other Parts Discussed in Thread: OMAPL138

Got a DSP project and an ARM project I'm trying to debug that uses shared memory.

If I run the DSP project by itself the OMAPL138_DSP.gel completes without errors

If I run the ARM project by itself the OMAPL138_ARM.gel will fail, unless I bypass init of the DSP core.

It gives the following:

ARM9_0: Output:     Memory Map Cleared.
ARM9_0: Output:     ---------------------------------------------
ARM9_0: Output:     Memory Map Setup Complete.
ARM9_0: Output:     ---------------------------------------------
ARM9_0: GEL: Error while executing OnTargetConnect(): Attempted to read unmapped virtual memory at 0x01E27800     at (*((unsigned int *) ((0x01E27000+0x800)+(4*LPSC_num)))&0x1F) [TI_Update_OMAPL138_ARM.gel:849]     at PSC1_LPSC_enable(0, 0) [TI_Update_OMAPL138_ARM.gel:548]     at PSC_All_On_Full_EVM() [TI_Update_OMAPL138_ARM.gel:242]     at OnTargetConnect() .
C674X_0: Output:     Target Connected.
C674X_0: Output:     ---------------------------------------------
C674X_0: Output:     Memory Map Cleared.
C674X_0: Output:     ---------------------------------------------
C674X_0: Output:     Memory Map Setup Complete.
C674X_0: Output:     ---------------------------------------------
C674X_0: Output:     mDDR initialization is in progress....
C674X_0: Output:     PLL1 init done for DDR:150MHz
C674X_0: Output:     Using mDDR settings
C674X_0: Output:     mDDR init for 150 MHz is done
C674X_0: Output:     Enabling Experimenter PSCs...
C674X_0: Output:     PSC Enable Complete.
C674X_0: Output:     ---------------------------------------------
C674X_0: Output:     KICK Unlocked.
C674X_0: Output:     ---------------------------------------------

I get the same for the integrated debug session, but both cores break at main. I am wondering if this is screwing up my shared memory testing since if I continue debugging this does not appear to be working properly.

Any help/info here is appreciated.