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SWCU093B document and clarification

In document SWCU093B are presented two schematics which should note differences in VRTC supply for DDRAM2 and DDRAM3.

Signals INT1 and SLEEP are connected to  GPIO1_8 and GPIO1_9.

It really is confused what is presented under GPIO1_8 (or 1_9).

There are more doubts (could be used any GPIO bank, or only some banks, or only some signals of this bank...)?

  • Hi Semir,
     
    If you look at AM335X GP EVM, AM335X ICE EVM and AM335X Starter Kit schematics you will see that these signals are ether not connected to processor, or routed through serial 0Ohm resistor which is not mounted. Where they have been routed, they go to a free GPIO, not particularly to GPIO1_8 and GPIO1_9. This makes me think that INT1 and SLEEP are not supported by software.
     
    As for GPIO1_8 and GPIO1_9, these are balls E18 and E17 on the ZCZ package (resp. balls F19 and F18 on the ZCE package). See Table 2-14 on page 55 of the AM335X Datasheet.
     
    Best Regards
    Biser