We have a situation where a CorePac and the CCS emulation freeze up on a read of the SDTIM1 register. We have successfully loaded code over PCIe and run a memory test, but when we try to capture the register values prior to starting some more extensive memory tests, we cannot read from SDTIM1.
I cannot find the DDR3 EMIF MMRs in section 4 System Interconnect.
I would like to see if there are other modules that are blocked or if it is only the DDR3 EMIF MMRs that are blocked at this point.
Regards,
RandyP
