AIF and FSYNC unused in C6474

Hao,

The documentation is not clear on our recommendation when the entire AIF peripheral is not used.  We are verifying this with the design team but believe all power pins must receive the rated voltage even is AIF is unused.  If the design team responds differently, we will update this thread.

The AIF_VDDT11, AIF_VDDD11 and AIF_VDDA11 supply inputs must receive 1.1V.  The AIF_VDDR18 supply inputs must receive 1.8V.  These supply inputs will not require the filtering as defined in the Hardware Design Guide but the supply voltage will be needed.  The current draw on these pins will be very low because the software will allow these circuits to remain clock gated and powered down internally.

The Hardware Design Guide states that unused AIF RX and TX pins can be left floating as stated in section 7.7.1.  The unused FSYNCCLKP/N and FRAMEBURSTP/N pins must be terminated as shown in Figure 21 of the HDG.

Tom