Hi,
I am trying to know how the GPMC_FCLK cycles are being calculated for the GPMC NAND interface.
How to increase or decrease the GPMC_FCLK cycles for read,write or any other access in the GPMC_CONFIGi registers.
On what basis do we calculate the number of GPMC_FCLK cycles and how do we calculate the number of GPMC_FCLK cycles? is there any formula or something?
Could someone help me on this?
Thanks
Prakash